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Sue Hagarman

Examiner (ID: 2208)

Most Active Art Unit
3406
Art Unit(s)
3406
Total Applications
337
Issued Applications
322
Pending Applications
0
Abandoned Applications
15

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11346237 [patent_doc_number] => 09530654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-27 [patent_title] => 'FINFET fin height control' [patent_app_type] => utility [patent_app_number] => 13/862819 [patent_app_country] => US [patent_app_date] => 2013-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3393 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13862819 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/862819
FINFET fin height control Apr 14, 2013 Issued
Array ( [id] => 9737648 [patent_doc_number] => 20140273366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'Semiconductor Devices and Methods of Manufacture Thereof' [patent_app_type] => utility [patent_app_number] => 13/861247 [patent_app_country] => US [patent_app_date] => 2013-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5578 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13861247 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/861247
Methods of manufacturing a semiconductor device Apr 10, 2013 Issued
Array ( [id] => 9785852 [patent_doc_number] => 20140302672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-09 [patent_title] => 'Method of Forming Metal Contacts in the Barrier Layer of a Group III-N HEMT' [patent_app_type] => utility [patent_app_number] => 13/856016 [patent_app_country] => US [patent_app_date] => 2013-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2733 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13856016 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/856016
Method of forming metal contacts in the barrier layer of a group III-N HEMT Apr 2, 2013 Issued
Array ( [id] => 9013907 [patent_doc_number] => 20130228871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'PLASMA DOPING TO REDUCE DIELECTRIC LOSS DURING REMOVAL OF DUMMY LAYERS IN A GATE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/854251 [patent_app_country] => US [patent_app_date] => 2013-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13854251 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/854251
Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure Mar 31, 2013 Issued
Array ( [id] => 9013972 [patent_doc_number] => 20130228936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'METHOD OF FORMING THROUGH SILICON VIA OF SEMICONDUCTOR DEVICE USING LOW-K DIELECTRIC MATERIAL' [patent_app_type] => utility [patent_app_number] => 13/850918 [patent_app_country] => US [patent_app_date] => 2013-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4010 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13850918 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/850918
Method of forming through silicon via of semiconductor device using low-K dielectric material Mar 25, 2013 Issued
Array ( [id] => 9729160 [patent_doc_number] => 20140264867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'METHOD OF FORMING HYBRID DIFFUSION BARRIER LAYER AND SEMICONDUCTOR DEVICE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/833794 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3833 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13833794 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/833794
Method of forming hybrid diffusion barrier layer and semiconductor device thereof Mar 14, 2013 Issued
Array ( [id] => 9901587 [patent_doc_number] => 20150056786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-26 [patent_title] => 'FABRICATION METHOD OF SILICON CARBIDE SEMICONDUCTOR APPARATUS AND SILICON CARBIDE SEMICONDUCTOR APPARATUS FABRICATED THEREBY' [patent_app_type] => utility [patent_app_number] => 14/388729 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6195 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14388729 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/388729
Fabrication method of silicon carbide semiconductor apparatus and silicon carbide semiconductor apparatus fabricated thereby Mar 13, 2013 Issued
Array ( [id] => 10121657 [patent_doc_number] => 09156004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Fabrication of enclosed nanochannels using silica nanoparticles' [patent_app_type] => utility [patent_app_number] => 13/831537 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 28 [patent_no_of_words] => 7458 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13831537 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/831537
Fabrication of enclosed nanochannels using silica nanoparticles Mar 13, 2013 Issued
Array ( [id] => 9127072 [patent_doc_number] => 08575021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-05 [patent_title] => 'Substrate processing including a masking layer' [patent_app_type] => utility [patent_app_number] => 13/829290 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 14526 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13829290 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/829290
Substrate processing including a masking layer Mar 13, 2013 Issued
Array ( [id] => 9064880 [patent_doc_number] => 20130256636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'FUNCTION LAYER INK, METHOD FOR MANUFACTURING LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, AND ELECTRONIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/800082 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 12172 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13800082 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/800082
Function layer ink, method for manufacturing light-emitting element, light-emitting device, and electronic apparatus Mar 12, 2013 Issued
Array ( [id] => 9957876 [patent_doc_number] => 09006080 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Varied STI liners for isolation structures in image sensing devices' [patent_app_type] => utility [patent_app_number] => 13/797464 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 31 [patent_no_of_words] => 7749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13797464 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/797464
Varied STI liners for isolation structures in image sensing devices Mar 11, 2013 Issued
Array ( [id] => 8940097 [patent_doc_number] => 20130189895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'METHOD OF MANUFACTURING ORGANIC-LIGHT-EMITTING-DIODE FLAT-PANEL LIGHT-SOURCE APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/795006 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3807 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13795006 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/795006
Method of manufacturing organic-light-emitting-diode flat-panel light-source apparatus Mar 11, 2013 Issued
Array ( [id] => 9198286 [patent_doc_number] => 20130337601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'STRUCTURES AND METHODS FOR HIGH EFFICIENCY COMPOUND SEMICONDUCTOR SOLAR CELLS' [patent_app_type] => utility [patent_app_number] => 13/781708 [patent_app_country] => US [patent_app_date] => 2013-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 15078 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13781708 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/781708
STRUCTURES AND METHODS FOR HIGH EFFICIENCY COMPOUND SEMICONDUCTOR SOLAR CELLS Feb 27, 2013 Abandoned
Array ( [id] => 8887516 [patent_doc_number] => 20130160699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'Method of Manufacturing III-Nitride Crystal' [patent_app_type] => utility [patent_app_number] => 13/762401 [patent_app_country] => US [patent_app_date] => 2013-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 18445 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13762401 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/762401
Method of manufacturing III-nitride crystal Feb 7, 2013 Issued
Array ( [id] => 9121550 [patent_doc_number] => 20130288472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'METHODS OF FABRICATING SEMICONDUCTOR DEVICES HAVING BURIED CHANNEL ARRAY' [patent_app_type] => utility [patent_app_number] => 13/761376 [patent_app_country] => US [patent_app_date] => 2013-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 74 [patent_figures_cnt] => 74 [patent_no_of_words] => 20334 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13761376 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/761376
Methods of fabricating semiconductor devices having buried channel array Feb 6, 2013 Issued
Array ( [id] => 9034401 [patent_doc_number] => 20130237039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'TWO-STEP HYDROGEN ANNEALING PROCESS FOR CREATING UNIFORM NON-PLANAR SEMICONDUCTOR DEVICES AT AGGRESSIVE PITCH' [patent_app_type] => utility [patent_app_number] => 13/759648 [patent_app_country] => US [patent_app_date] => 2013-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7710 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13759648 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/759648
Two-step hydrogen annealing process for creating uniform non-planar semiconductor devices at aggressive pitch Feb 4, 2013 Issued
Array ( [id] => 10897977 [patent_doc_number] => 08921191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-30 [patent_title] => 'Integrated circuits including FINFET devices with lower contact resistance and reduced parasitic capacitance and methods for fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/759156 [patent_app_country] => US [patent_app_date] => 2013-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4068 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13759156 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/759156
Integrated circuits including FINFET devices with lower contact resistance and reduced parasitic capacitance and methods for fabricating the same Feb 4, 2013 Issued
Array ( [id] => 9711240 [patent_doc_number] => 08835813 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Heat treatment apparatus and method for heating substrate by light-irradiation' [patent_app_type] => utility [patent_app_number] => 13/759658 [patent_app_country] => US [patent_app_date] => 2013-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16576 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13759658 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/759658
Heat treatment apparatus and method for heating substrate by light-irradiation Feb 4, 2013 Issued
13/759092 METHOD OF FORMING PRINTED PATTERNS Feb 4, 2013 Abandoned
Array ( [id] => 10138432 [patent_doc_number] => 09171753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-27 [patent_title] => 'Semiconductor devices having conductive via structures and methods for fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/758239 [patent_app_country] => US [patent_app_date] => 2013-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 49 [patent_no_of_words] => 11717 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13758239 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/758239
Semiconductor devices having conductive via structures and methods for fabricating the same Feb 3, 2013 Issued
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