Search

Sue Hagarman

Examiner (ID: 2208)

Most Active Art Unit
3406
Art Unit(s)
3406
Total Applications
337
Issued Applications
322
Pending Applications
0
Abandoned Applications
15

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 131440 [patent_doc_number] => 07700391 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-04-20 [patent_title] => 'Method of fabricating optical device using multiple sacrificial spacer layers' [patent_app_type] => utility [patent_app_number] => 12/454040 [patent_app_country] => US [patent_app_date] => 2009-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7033 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/700/07700391.pdf [firstpage_image] =>[orig_patent_app_number] => 12454040 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/454040
Method of fabricating optical device using multiple sacrificial spacer layers May 4, 2009 Issued
Array ( [id] => 131435 [patent_doc_number] => 07700387 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-04-20 [patent_title] => 'Method of fabricating optical device using multiple sacrificial spacer layers' [patent_app_type] => utility [patent_app_number] => 12/454023 [patent_app_country] => US [patent_app_date] => 2009-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7035 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/700/07700387.pdf [firstpage_image] =>[orig_patent_app_number] => 12454023 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/454023
Method of fabricating optical device using multiple sacrificial spacer layers May 4, 2009 Issued
Array ( [id] => 5404026 [patent_doc_number] => 20090239340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'METHODS FOR A MULTIPLE DIE INTEGRATED CIRCUIT PACKAGE' [patent_app_type] => utility [patent_app_number] => 12/430388 [patent_app_country] => US [patent_app_date] => 2009-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7839 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20090239340.pdf [firstpage_image] =>[orig_patent_app_number] => 12430388 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/430388
Methods for a multiple die integrated circuit package Apr 26, 2009 Issued
Array ( [id] => 8352552 [patent_doc_number] => 08247881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-21 [patent_title] => 'Photodiodes with surface plasmon couplers' [patent_app_type] => utility [patent_app_number] => 12/430447 [patent_app_country] => US [patent_app_date] => 2009-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 5230 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12430447 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/430447
Photodiodes with surface plasmon couplers Apr 26, 2009 Issued
Array ( [id] => 5477591 [patent_doc_number] => 20090200548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-13 [patent_title] => 'GUARD RING EXTENSION TO PREVENT REALIABILITY FAILURES' [patent_app_type] => utility [patent_app_number] => 12/425708 [patent_app_country] => US [patent_app_date] => 2009-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4225 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20090200548.pdf [firstpage_image] =>[orig_patent_app_number] => 12425708 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/425708
Guard ring extension to prevent reliability failures Apr 16, 2009 Issued
Array ( [id] => 7751420 [patent_doc_number] => 08110453 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-07 [patent_title] => 'Low temperature thin film transistor process, device property, and device stability improvement' [patent_app_type] => utility [patent_app_number] => 12/425228 [patent_app_country] => US [patent_app_date] => 2009-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8830 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/110/08110453.pdf [firstpage_image] =>[orig_patent_app_number] => 12425228 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/425228
Low temperature thin film transistor process, device property, and device stability improvement Apr 15, 2009 Issued
Array ( [id] => 8177031 [patent_doc_number] => 08178430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-15 [patent_title] => 'N-type carrier enhancement in semiconductors' [patent_app_type] => utility [patent_app_number] => 12/420258 [patent_app_country] => US [patent_app_date] => 2009-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4613 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/178/08178430.pdf [firstpage_image] =>[orig_patent_app_number] => 12420258 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/420258
N-type carrier enhancement in semiconductors Apr 7, 2009 Issued
Array ( [id] => 5383010 [patent_doc_number] => 20090224254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-10 [patent_title] => 'THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/417280 [patent_app_country] => US [patent_app_date] => 2009-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 55 [patent_no_of_words] => 15775 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20090224254.pdf [firstpage_image] =>[orig_patent_app_number] => 12417280 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/417280
Thin film transistor array panel and manufacturing method thereof Apr 1, 2009 Issued
Array ( [id] => 8028027 [patent_doc_number] => 08143093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-27 [patent_title] => 'Process to make metal oxide thin film transistor array with etch stopping layer' [patent_app_type] => utility [patent_app_number] => 12/405897 [patent_app_country] => US [patent_app_date] => 2009-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 3857 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/143/08143093.pdf [firstpage_image] =>[orig_patent_app_number] => 12405897 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/405897
Process to make metal oxide thin film transistor array with etch stopping layer Mar 16, 2009 Issued
Array ( [id] => 6309949 [patent_doc_number] => 20100110746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'MEMORY CELL WITH ALIGNMENT STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/402748 [patent_app_country] => US [patent_app_date] => 2009-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5529 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20100110746.pdf [firstpage_image] =>[orig_patent_app_number] => 12402748 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/402748
Memory cell with alignment structure Mar 11, 2009 Issued
Array ( [id] => 5432018 [patent_doc_number] => 20090166604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'RESISTANCE TYPE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/403186 [patent_app_country] => US [patent_app_date] => 2009-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6833 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20090166604.pdf [firstpage_image] =>[orig_patent_app_number] => 12403186 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/403186
Resistance type memory device Mar 11, 2009 Issued
Array ( [id] => 5389117 [patent_doc_number] => 20090206429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'ANGLED IMPLANT FOR TRENCH ISOLATION' [patent_app_type] => utility [patent_app_number] => 12/400597 [patent_app_country] => US [patent_app_date] => 2009-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6293 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20090206429.pdf [firstpage_image] =>[orig_patent_app_number] => 12400597 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/400597
Angled implant for trench isolation Mar 8, 2009 Issued
Array ( [id] => 5472145 [patent_doc_number] => 20090245311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-01 [patent_title] => 'PROCESS FOR PRODUCING NITRIDE SEMICONDUCTOR LASER, AND NITRIDE SEMICONDUCTOR LASER' [patent_app_type] => utility [patent_app_number] => 12/397783 [patent_app_country] => US [patent_app_date] => 2009-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5012 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20090245311.pdf [firstpage_image] =>[orig_patent_app_number] => 12397783 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/397783
PROCESS FOR PRODUCING NITRIDE SEMICONDUCTOR LASER, AND NITRIDE SEMICONDUCTOR LASER Mar 3, 2009 Abandoned
Array ( [id] => 5340552 [patent_doc_number] => 20090179202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'THIN FILM TRANSISTOR ARRAY PANEL FOR A LIQUID CRYSTAL DISPLAY AND A METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/364736 [patent_app_country] => US [patent_app_date] => 2009-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 59 [patent_no_of_words] => 15685 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20090179202.pdf [firstpage_image] =>[orig_patent_app_number] => 12364736 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/364736
THIN FILM TRANSISTOR ARRAY PANEL FOR A LIQUID CRYSTAL DISPLAY AND A METHOD FOR MANUFACTURING THE SAME Feb 2, 2009 Abandoned
Array ( [id] => 5561051 [patent_doc_number] => 20090133903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-28 [patent_title] => 'ELECTRODE AND METHOD FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/360204 [patent_app_country] => US [patent_app_date] => 2009-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1748 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20090133903.pdf [firstpage_image] =>[orig_patent_app_number] => 12360204 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/360204
ELECTRODE AND METHOD FOR FORMING THE SAME Jan 26, 2009 Abandoned
Array ( [id] => 4553085 [patent_doc_number] => 07960803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-14 [patent_title] => 'Electronic device having a hafnium nitride and hafnium oxide film' [patent_app_type] => utility [patent_app_number] => 12/359748 [patent_app_country] => US [patent_app_date] => 2009-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8876 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/960/07960803.pdf [firstpage_image] =>[orig_patent_app_number] => 12359748 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/359748
Electronic device having a hafnium nitride and hafnium oxide film Jan 25, 2009 Issued
Array ( [id] => 22315 [patent_doc_number] => 07799705 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-09-21 [patent_title] => 'Methods for producing low stress porous low-k dielectric materials using precursors with organic functional groups' [patent_app_type] => utility [patent_app_number] => 12/348791 [patent_app_country] => US [patent_app_date] => 2009-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6265 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/799/07799705.pdf [firstpage_image] =>[orig_patent_app_number] => 12348791 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/348791
Methods for producing low stress porous low-k dielectric materials using precursors with organic functional groups Jan 4, 2009 Issued
Array ( [id] => 5546121 [patent_doc_number] => 20090155998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'Atomic layer deposited tantalum containing adhesion layer' [patent_app_type] => utility [patent_app_number] => 12/317537 [patent_app_country] => US [patent_app_date] => 2008-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2991 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20090155998.pdf [firstpage_image] =>[orig_patent_app_number] => 12317537 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/317537
Atomic layer deposited tantalum containing adhesion layer Dec 23, 2008 Issued
Array ( [id] => 5397891 [patent_doc_number] => 20090317954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'Method for forming vertical channel transistor of semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/318177 [patent_app_country] => US [patent_app_date] => 2008-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2702 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0317/20090317954.pdf [firstpage_image] =>[orig_patent_app_number] => 12318177 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/318177
Method for forming vertical channel transistor of semiconductor device Dec 22, 2008 Issued
Array ( [id] => 6623561 [patent_doc_number] => 20100003773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-07 [patent_title] => 'METHOD FOR MANUFACTURING LIQUID DISCHARGE HEAD' [patent_app_type] => utility [patent_app_number] => 12/339047 [patent_app_country] => US [patent_app_date] => 2008-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4219 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20100003773.pdf [firstpage_image] =>[orig_patent_app_number] => 12339047 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/339047
Method for manufacturing liquid discharge head Dec 18, 2008 Issued
Menu