Sue Hagarman

Array ( [id] => 1156492 [patent_doc_number] => 06762136 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-13 [patent_title] => 'Method for rapid thermal processing of substrates' [patent_app_type] => B1 [patent_app_number] => 09/693117 [patent_app_country] => US [patent_app_date] => 2000-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 12212 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762136.pdf [firstpage_image] =>[orig_patent_app_number] => 09693117 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1202677 [patent_doc_number] => 06720228 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-13 [patent_title] => 'Current source bias circuit with hot carrier injection tracking' [patent_app_type] => B1 [patent_app_number] => 09/691949 [patent_app_country] => US [patent_app_date] => 2000-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1780 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/720/06720228.pdf [firstpage_image] =>[orig_patent_app_number] => 09691949 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1412231 [patent_doc_number] => 06524922 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'Semiconductor device having increased breakdown voltage and method of fabricating same' [patent_app_type] => B1 [patent_app_number] => 09/675117 [patent_app_country] => US [patent_app_date] => 2000-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 3777 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/524/06524922.pdf [firstpage_image] =>[orig_patent_app_number] => 09675117 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1228243 [patent_doc_number] => 06696341 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-24 [patent_title] => 'Method of manufacturing a semiconductor device having electrostatic discharge protection element' [patent_app_type] => B1 [patent_app_number] => 09/667497 [patent_app_country] => US [patent_app_date] => 2000-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 8943 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/696/06696341.pdf [firstpage_image] =>[orig_patent_app_number] => 09667497 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 386975 [patent_doc_number] => 07304344 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-12-04 [patent_title] => 'Integrated circuit having independently formed array and peripheral isolation dielectrics' [patent_app_type] => utility [patent_app_number] => 09/620649 [patent_app_country] => US [patent_app_date] => 2000-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3502 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/304/07304344.pdf [firstpage_image] =>[orig_patent_app_number] => 09620649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1216378 [patent_doc_number] => 06706572 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-16 [patent_title] => 'Method for manufacturing a thin film transistor using a high pressure oxidation step' [patent_app_type] => B1 [patent_app_number] => 09/615078 [patent_app_country] => US [patent_app_date] => 2000-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 24 [patent_no_of_words] => 9475 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/706/06706572.pdf [firstpage_image] =>[orig_patent_app_number] => 09615078 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1536456 [patent_doc_number] => 06489651 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'MOS transistor that inhibits punchthrough' [patent_app_type] => B1 [patent_app_number] => 09/595851 [patent_app_country] => US [patent_app_date] => 2000-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1740 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/489/06489651.pdf [firstpage_image] =>[orig_patent_app_number] => 09595851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1245710 [patent_doc_number] => 06677214 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-13 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => B1 [patent_app_number] => 09/593657 [patent_app_country] => US [patent_app_date] => 2000-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 209 [patent_figures_cnt] => 321 [patent_no_of_words] => 109324 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/677/06677214.pdf [firstpage_image] =>[orig_patent_app_number] => 09593657 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1401318 [patent_doc_number] => 06534349 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Method of manufacturing a semiconductor device having a two-layered electrode structure' [patent_app_type] => B1 [patent_app_number] => 09/592277 [patent_app_country] => US [patent_app_date] => 2000-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 11476 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/534/06534349.pdf [firstpage_image] =>[orig_patent_app_number] => 09592277 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1315843 [patent_doc_number] => 06610998 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-26 [patent_title] => 'Method and structure for crystallizing a film' [patent_app_type] => B1 [patent_app_number] => 09/577823 [patent_app_country] => US [patent_app_date] => 2000-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2099 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/610/06610998.pdf [firstpage_image] =>[orig_patent_app_number] => 09577823 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1172581 [patent_doc_number] => 06750107 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-15 [patent_title] => 'Method and apparatus for isolating a SRAM cell' [patent_app_type] => B1 [patent_app_number] => 09/565429 [patent_app_country] => US [patent_app_date] => 2000-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4176 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/750/06750107.pdf [firstpage_image] =>[orig_patent_app_number] => 09565429 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4327860 [patent_doc_number] => 06319853 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Method of manufacturing a semiconductor device using a minute resist pattern, and a semiconductor device manufactured thereby' [patent_app_type] => 1 [patent_app_number] => 9/537671 [patent_app_country] => US [patent_app_date] => 2000-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 70 [patent_no_of_words] => 13450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/319/06319853.pdf [firstpage_image] =>[orig_patent_app_number] => 537671 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6548304 [patent_doc_number] => 20020111018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Method for forming metal silicide layer' [patent_app_type] => new [patent_app_number] => 09/490277 [patent_app_country] => US [patent_app_date] => 2000-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7879 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20020111018.pdf [firstpage_image] =>[orig_patent_app_number] => 09490277 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1507505 [patent_doc_number] => 06440860 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride' [patent_app_type] => B1 [patent_app_number] => 09/488947 [patent_app_country] => US [patent_app_date] => 2000-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3912 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/440/06440860.pdf [firstpage_image] =>[orig_patent_app_number] => 09488947 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1082899 [patent_doc_number] => 06833315 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-21 [patent_title] => 'Removing silicon oxynitride of polysilicon gates in fabricating integrated circuits' [patent_app_type] => B1 [patent_app_number] => 09/477110 [patent_app_country] => US [patent_app_date] => 1999-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 1082 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/833/06833315.pdf [firstpage_image] =>[orig_patent_app_number] => 09477110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1324303 [patent_doc_number] => 06602774 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-05 [patent_title] => 'Selective salicidation process for electronic devices integrated in a semiconductor substrate' [patent_app_type] => B1 [patent_app_number] => 09/473367 [patent_app_country] => US [patent_app_date] => 1999-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 1789 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/602/06602774.pdf [firstpage_image] =>[orig_patent_app_number] => 09473367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7643950 [patent_doc_number] => 06429088 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Method of fabricating improved capacitors with pinhole repair consideration when oxide conductors are used' [patent_app_type] => B1 [patent_app_number] => 09/467137 [patent_app_country] => US [patent_app_date] => 1999-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3731 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429088.pdf [firstpage_image] =>[orig_patent_app_number] => 09467137 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4336668 [patent_doc_number] => 06333250 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-25 [patent_title] => 'Method of forming gate electrode in semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/460557 [patent_app_country] => US [patent_app_date] => 1999-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1481 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/333/06333250.pdf [firstpage_image] =>[orig_patent_app_number] => 460557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1120870 [patent_doc_number] => 06798030 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-28 [patent_title] => 'Two-dimensional image detecting device and manufacturing method thereof' [patent_app_type] => B1 [patent_app_number] => 09/459641 [patent_app_country] => US [patent_app_date] => 1999-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 18021 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798030.pdf [firstpage_image] =>[orig_patent_app_number] => 09459641 [rel_patent_id] =>[rel_patent_doc_number] =>)