Search

Sue X. Lao

Examiner (ID: 7164)

Most Active Art Unit
2126
Art Unit(s)
2194, 2151, 2755, 2126
Total Applications
284
Issued Applications
211
Pending Applications
49
Abandoned Applications
24

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18234936 [patent_doc_number] => 11599495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Device for performing communication and computing system including the same [patent_app_type] => utility [patent_app_number] => 17/350945 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 11118 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/350945
Device for performing communication and computing system including the same Jun 16, 2021 Issued
Array ( [id] => 17114044 [patent_doc_number] => 20210294641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => DYNAMIC INTERRUPT STEERING AND PROCESSOR UNIT IDLE STATE DEMOTION [patent_app_type] => utility [patent_app_number] => 17/342476 [patent_app_country] => US [patent_app_date] => 2021-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11244 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17342476 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/342476
DYNAMIC INTERRUPT STEERING AND PROCESSOR UNIT IDLE STATE DEMOTION Jun 7, 2021 Pending
Array ( [id] => 18356815 [patent_doc_number] => 11645217 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Dynamic command scheduling for storage system [patent_app_type] => utility [patent_app_number] => 17/330286 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5197 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17330286 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/330286
Dynamic command scheduling for storage system May 24, 2021 Issued
Array ( [id] => 17522023 [patent_doc_number] => 20220107872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => METHODS AND SERVERS FOR STORING DATA ASSOCIATED WITH USERS AND DIGITAL ITEMS OF A RECOMMENDATION SYSTEM [patent_app_type] => utility [patent_app_number] => 17/317978 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22367 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 557 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17317978 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/317978
Methods and servers for storing data associated with users and digital items of a recommendation system May 11, 2021 Issued
Array ( [id] => 18204179 [patent_doc_number] => 11586571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Multi-threaded, self-scheduling reconfigurable computing fabric [patent_app_type] => utility [patent_app_number] => 17/318200 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 29 [patent_no_of_words] => 31726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17318200 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/318200
Multi-threaded, self-scheduling reconfigurable computing fabric May 11, 2021 Issued
Array ( [id] => 17992040 [patent_doc_number] => 20220358077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => SERIAL PERIPHERAL INTERFACE (SPI) AUTOMATIC REGISTER ADDRESS INCREMENTATION ACROSS DATA FRAMES [patent_app_type] => utility [patent_app_number] => 17/314203 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17314203 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/314203
Serial peripheral interface (SPI) automatic register address incrementation across data frames May 6, 2021 Issued
Array ( [id] => 17984730 [patent_doc_number] => 20220350767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => FLEXIBLE HIGH-AVAILABILITY COMPUTING WITH PARALLEL CONFIGURABLE FABRICS [patent_app_type] => utility [patent_app_number] => 17/245455 [patent_app_country] => US [patent_app_date] => 2021-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17245455 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/245455
Flexible high-availability computing with parallel configurable fabrics Apr 29, 2021 Issued
Array ( [id] => 17114171 [patent_doc_number] => 20210294768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => FIELD DEVICE [patent_app_type] => utility [patent_app_number] => 17/197213 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197213 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/197213
FIELD DEVICE Mar 9, 2021 Abandoned
Array ( [id] => 17098957 [patent_doc_number] => 20210286748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => SINGLE-PAIR TO MULTI-PAIR ETHERNET CONVERTER [patent_app_type] => utility [patent_app_number] => 17/193451 [patent_app_country] => US [patent_app_date] => 2021-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17193451 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/193451
Single-pair to multi-pair ethernet converter Mar 4, 2021 Issued
Array ( [id] => 17245649 [patent_doc_number] => 20210365393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => MEMORY CONTROLLER, MEMORY SYSTEM, AND CONTROL METHOD OF MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/190757 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4701 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190757 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190757
Memory controller, memory system, and control method of memory system Mar 2, 2021 Issued
Array ( [id] => 17475974 [patent_doc_number] => 20220083478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => INFORMATION PROCESSING SYSTEM, STORAGE DEVICE, AND CALIBRATION METHOD [patent_app_type] => utility [patent_app_number] => 17/190134 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7858 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190134 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190134
Information processing system, storage device, and calibration method Mar 1, 2021 Issued
Array ( [id] => 17430433 [patent_doc_number] => 20220058142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => DUAL DATA PORTS WITH SHARED DETECTION LINE [patent_app_type] => utility [patent_app_number] => 17/185859 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6835 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185859 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185859
Dual data ports with shared detection line Feb 24, 2021 Issued
Array ( [id] => 17054447 [patent_doc_number] => 20210263881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-26 [patent_title] => COMPUTER SYSTEM AND METHOD OF OPERATING A COMPUTER SYSTEM [patent_app_type] => utility [patent_app_number] => 17/179834 [patent_app_country] => US [patent_app_date] => 2021-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6270 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17179834 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/179834
COMPUTER SYSTEM AND METHOD OF OPERATING A COMPUTER SYSTEM Feb 18, 2021 Abandoned
Array ( [id] => 17026327 [patent_doc_number] => 20210250199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => MONOLITHIC HIGH-VOLTAGE TRANSCEIVER CONNECTED TO TWO DIFFERENT SUPPLY VOLTAGE DOMAINS [patent_app_type] => utility [patent_app_number] => 17/248675 [patent_app_country] => US [patent_app_date] => 2021-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12706 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17248675 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/248675
Monolithic high-voltage transceiver connected to two different supply voltage domains Feb 1, 2021 Issued
Array ( [id] => 18606828 [patent_doc_number] => 11748295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Scramble and descramble hardware implementation method based on data bit width expansion [patent_app_type] => utility [patent_app_number] => 17/916667 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2211 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17916667 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/916667
Scramble and descramble hardware implementation method based on data bit width expansion Jan 28, 2021 Issued
Array ( [id] => 18493452 [patent_doc_number] => 11698870 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Memory module data buffer [patent_app_type] => utility [patent_app_number] => 17/162962 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5382 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17162962 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/162962
Memory module data buffer Jan 28, 2021 Issued
Array ( [id] => 16979981 [patent_doc_number] => 20210224218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => SERIAL DATA PROCESSING DEVICE AND DATA OFFSET CALIBRATION METHOD [patent_app_type] => utility [patent_app_number] => 17/138969 [patent_app_country] => US [patent_app_date] => 2020-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17138969 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/138969
Serial data processing device and data offset calibration method Dec 30, 2020 Issued
Array ( [id] => 17970158 [patent_doc_number] => 11487692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Shield board [patent_app_type] => utility [patent_app_number] => 17/132269 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3872 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17132269 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/132269
Shield board Dec 22, 2020 Issued
Array ( [id] => 19458899 [patent_doc_number] => 12099388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Temperature-based runtime variability in victim address selection for probabilistic schemes for row hammer [patent_app_type] => utility [patent_app_number] => 17/130686 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8612 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17130686 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/130686
Temperature-based runtime variability in victim address selection for probabilistic schemes for row hammer Dec 21, 2020 Issued
Array ( [id] => 18480073 [patent_doc_number] => 11693814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Systems and methods for expanding memory access [patent_app_type] => utility [patent_app_number] => 17/127279 [patent_app_country] => US [patent_app_date] => 2020-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4135 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17127279 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/127279
Systems and methods for expanding memory access Dec 17, 2020 Issued
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