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Sultana Begum

Examiner (ID: 10216, Phone: (571)431-0691 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
594
Issued Applications
520
Pending Applications
71
Abandoned Applications
33

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19618895 [patent_doc_number] => 20240404575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => MEMORY DEVICE HAVING NON-UNIFORM REFRESH [patent_app_type] => utility [patent_app_number] => 18/740400 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18740400 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/740400
MEMORY DEVICE HAVING NON-UNIFORM REFRESH Jun 10, 2024 Pending
Array ( [id] => 20246171 [patent_doc_number] => 12426517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Resistive memory device with protrusion covered with resistance changing element and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/735715 [patent_app_country] => US [patent_app_date] => 2024-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 1205 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18735715 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/735715
Resistive memory device with protrusion covered with resistance changing element and method for manufacturing the same Jun 5, 2024 Issued
Array ( [id] => 20044609 [patent_doc_number] => 20250182831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => STORAGE DEVICE FOR PERFORMING REFRESH OPERATION AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/674569 [patent_app_country] => US [patent_app_date] => 2024-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3360 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18674569 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/674569
STORAGE DEVICE FOR PERFORMING REFRESH OPERATION AND OPERATING METHOD THEREOF May 23, 2024 Pending
Array ( [id] => 20044609 [patent_doc_number] => 20250182831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => STORAGE DEVICE FOR PERFORMING REFRESH OPERATION AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/674569 [patent_app_country] => US [patent_app_date] => 2024-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3360 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18674569 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/674569
STORAGE DEVICE FOR PERFORMING REFRESH OPERATION AND OPERATING METHOD THEREOF May 23, 2024 Pending
Array ( [id] => 19589417 [patent_doc_number] => 20240386974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => LEVEL-BASED DATA REFRESH IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 18/662945 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12413 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662945 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662945
LEVEL-BASED DATA REFRESH IN A MEMORY SUB-SYSTEM May 12, 2024 Pending
Array ( [id] => 20111256 [patent_doc_number] => 12361991 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Far end driver for memory clock [patent_app_type] => utility [patent_app_number] => 18/660338 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2472 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660338 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660338
Far end driver for memory clock May 9, 2024 Issued
Array ( [id] => 20332590 [patent_doc_number] => 12462874 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Memory device and operation method with optimized read level [patent_app_type] => utility [patent_app_number] => 18/635370 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 11822 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635370 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635370
Memory device and operation method with optimized read level Apr 14, 2024 Issued
Array ( [id] => 19589378 [patent_doc_number] => 20240386935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => SEMICONDUCTOR MEMORY DEVICE PERFORMING REFRESH OPERATION [patent_app_type] => utility [patent_app_number] => 18/635364 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3938 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635364 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635364
SEMICONDUCTOR MEMORY DEVICE PERFORMING REFRESH OPERATION Apr 14, 2024 Pending
Array ( [id] => 19515409 [patent_doc_number] => 20240347095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => MEMORY CONTROL APPARATUS AND MEMORY CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/626390 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7805 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626390 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626390
MEMORY CONTROL APPARATUS AND MEMORY CONTROL METHOD Apr 3, 2024 Pending
Array ( [id] => 19515409 [patent_doc_number] => 20240347095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => MEMORY CONTROL APPARATUS AND MEMORY CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/626390 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7805 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626390 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626390
MEMORY CONTROL APPARATUS AND MEMORY CONTROL METHOD Apr 3, 2024 Pending
Array ( [id] => 20019285 [patent_doc_number] => 20250157507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => NONVOLATILE MEMORY DEVICE INCLUDING MULTIPLE PAGE BUFFERS AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/626349 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626349 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626349
NONVOLATILE MEMORY DEVICE INCLUDING MULTIPLE PAGE BUFFERS AND OPERATING METHOD THEREOF Apr 3, 2024 Pending
Array ( [id] => 20019285 [patent_doc_number] => 20250157507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => NONVOLATILE MEMORY DEVICE INCLUDING MULTIPLE PAGE BUFFERS AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/626349 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626349 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626349
NONVOLATILE MEMORY DEVICE INCLUDING MULTIPLE PAGE BUFFERS AND OPERATING METHOD THEREOF Apr 3, 2024 Pending
Array ( [id] => 19912362 [patent_doc_number] => 12288580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-29 [patent_title] => Memory device and operating method for target refresh operation based on number of accesses [patent_app_type] => utility [patent_app_number] => 18/614763 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2271 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614763 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614763
Memory device and operating method for target refresh operation based on number of accesses Mar 24, 2024 Issued
Array ( [id] => 19912362 [patent_doc_number] => 12288580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-29 [patent_title] => Memory device and operating method for target refresh operation based on number of accesses [patent_app_type] => utility [patent_app_number] => 18/614763 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2271 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614763 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614763
Memory device and operating method for target refresh operation based on number of accesses Mar 24, 2024 Issued
Array ( [id] => 19305207 [patent_doc_number] => 20240233787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => Communication System With Mixed Threshold Voltage Transistors [patent_app_type] => utility [patent_app_number] => 18/610993 [patent_app_country] => US [patent_app_date] => 2024-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6382 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610993 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/610993
Communication system with mixed threshold voltage transistors Mar 19, 2024 Issued
Array ( [id] => 20305185 [patent_doc_number] => 12451181 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Bitline sense amplifier with equalizing transistor and a memory device [patent_app_type] => utility [patent_app_number] => 18/607646 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 5716 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18607646 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/607646
Bitline sense amplifier with equalizing transistor and a memory device Mar 17, 2024 Issued
Array ( [id] => 20235543 [patent_doc_number] => 20250292862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => METHODOLOGY TO ACHIEVE TRANSACTION REDUNDANCY IN MEMORY CONSTRAINED DEVICES [patent_app_type] => utility [patent_app_number] => 18/608183 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3168 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608183 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608183
METHODOLOGY TO ACHIEVE TRANSACTION REDUNDANCY IN MEMORY CONSTRAINED DEVICES Mar 17, 2024 Pending
Array ( [id] => 20235543 [patent_doc_number] => 20250292862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => METHODOLOGY TO ACHIEVE TRANSACTION REDUNDANCY IN MEMORY CONSTRAINED DEVICES [patent_app_type] => utility [patent_app_number] => 18/608183 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3168 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608183 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608183
METHODOLOGY TO ACHIEVE TRANSACTION REDUNDANCY IN MEMORY CONSTRAINED DEVICES Mar 17, 2024 Pending
Array ( [id] => 19285340 [patent_doc_number] => 20240221817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => WRITE DATA SIGNAL DELAY CONTROL METHOD AND APPARATUS, DEVICE, AND MEDIUM [patent_app_type] => utility [patent_app_number] => 18/604366 [patent_app_country] => US [patent_app_date] => 2024-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18097 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604366 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604366
WRITE DATA SIGNAL DELAY CONTROL METHOD AND APPARATUS, DEVICE, AND MEDIUM Mar 12, 2024 Pending
Array ( [id] => 19467664 [patent_doc_number] => 20240321334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => STORAGE DEVICE AND DRIVING METHOD OF STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/595065 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12395 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18595065 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/595065
STORAGE DEVICE AND DRIVING METHOD OF STORAGE DEVICE Mar 3, 2024 Pending
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