Sultana Begum

Array ( [id] => 18299132 [patent_doc_number] => 20230108818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => SEMICONDUCTOR SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/646439 [patent_app_country] => US [patent_app_date] => 2021-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7483 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17646439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19016078 [patent_doc_number] => 11923018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Semiconductor memory device and method with multiple verify voltages [patent_app_type] => utility [patent_app_number] => 17/561172 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 13125 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17561172 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19029003 [patent_doc_number] => 11928362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Fuse latch of semiconductor device for latching data of a repair fuse cell [patent_app_type] => utility [patent_app_number] => 17/557009 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4755 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17557009 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17778513 [patent_doc_number] => 20220244863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => TECHNIQUES FOR PERFORMING WRITE TRAINING ON A DYNAMIC RANDOM-ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 17/550811 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14348 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550811 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17508796 [patent_doc_number] => 20220101899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => DECODE CIRCUITRY COUPLED TO A MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 17/550668 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550668 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17508828 [patent_doc_number] => 20220101931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => MEMORY DEVICE INCLUDING MASSBIT COUNTER AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/548774 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15483 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548774 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19029760 [patent_doc_number] => 11929123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Semiconductor memory device with erase loops [patent_app_type] => utility [patent_app_number] => 17/643726 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 28 [patent_no_of_words] => 13288 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 384 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17643726 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18426177 [patent_doc_number] => 20230180642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => CROSSBAR MEMORY ARRAY IN FRONT END OF LINE [patent_app_type] => utility [patent_app_number] => 17/457926 [patent_app_country] => US [patent_app_date] => 2021-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6566 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17457926 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17551323 [patent_doc_number] => 20220122665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => MEMORY DEVICES FOR PATTERN MATCHING [patent_app_type] => utility [patent_app_number] => 17/542562 [patent_app_country] => US [patent_app_date] => 2021-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5124 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17542562 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17599066 [patent_doc_number] => 20220148640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => APPARATUSES AND METHODS FOR A MULTI-BIT DUTY CYCLE MONITOR [patent_app_type] => utility [patent_app_number] => 17/455468 [patent_app_country] => US [patent_app_date] => 2021-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9612 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455468 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17779834 [patent_doc_number] => 20220246184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => TECHNIQUES FOR PERFORMING WRITE TRAINING ON A DYNAMIC RANDOM-ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 17/523779 [patent_app_country] => US [patent_app_date] => 2021-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10304 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17523779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17779833 [patent_doc_number] => 20220246183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => TECHNIQUES FOR PERFORMING COMMAND ADDRESS INTERFACE TRAINING ON A DYNAMIC RANDOM-ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 17/523778 [patent_app_country] => US [patent_app_date] => 2021-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17523778 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17431439 [patent_doc_number] => 20220059148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/518888 [patent_app_country] => US [patent_app_date] => 2021-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9014 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17518888 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18721248 [patent_doc_number] => 11798600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Read accelerator circuit [patent_app_type] => utility [patent_app_number] => 17/518486 [patent_app_country] => US [patent_app_date] => 2021-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3292 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17518486 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19046466 [patent_doc_number] => 11935585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Pseudo multi-plane read methods and apparatus for non-volatile memory devices [patent_app_type] => utility [patent_app_number] => 17/509725 [patent_app_country] => US [patent_app_date] => 2021-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13111 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17509725 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19355521 [patent_doc_number] => 12055962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Low-voltage power supply reference generator circuit [patent_app_type] => utility [patent_app_number] => 17/508016 [patent_app_country] => US [patent_app_date] => 2021-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9164 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17508016 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18520617 [patent_doc_number] => 11710511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Semiconductor device having a high-speed memory with stable operation [patent_app_type] => utility [patent_app_number] => 17/501411 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 8801 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 335 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501411 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18219348 [patent_doc_number] => 11594294 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Memory device including massbit counter and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/493063 [patent_app_country] => US [patent_app_date] => 2021-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 37 [patent_no_of_words] => 15467 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17493063 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18414905 [patent_doc_number] => 11669447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Modifying subsets of memory bank operating parameters [patent_app_type] => utility [patent_app_number] => 17/488190 [patent_app_country] => US [patent_app_date] => 2021-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 20662 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488190 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18317359 [patent_doc_number] => 11631443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-18 [patent_title] => Semiconductor device and electronic device with serial, data transfer mechanism [patent_app_type] => utility [patent_app_number] => 17/480359 [patent_app_country] => US [patent_app_date] => 2021-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10057 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480359 [rel_patent_id] =>[rel_patent_doc_number] =>)