| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3758318
[patent_doc_number] => 05754802
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-19
[patent_title] => 'Increasing data transfer efficiency for a read operation in a non-split transaction bus environment by substituting a write operation for the read operation'
[patent_app_type] => 1
[patent_app_number] => 8/648424
[patent_app_country] => US
[patent_app_date] => 1996-05-15
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[pdf_file] => patents/05/754/05754802.pdf
[firstpage_image] =>[orig_patent_app_number] => 648424
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/648424 | Increasing data transfer efficiency for a read operation in a non-split transaction bus environment by substituting a write operation for the read operation | May 14, 1996 | Issued |
Array
(
[id] => 3682101
[patent_doc_number] => 05600841
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-04
[patent_title] => 'Method and apparatus for anticipatory power management for low power data'
[patent_app_type] => 1
[patent_app_number] => 8/639946
[patent_app_country] => US
[patent_app_date] => 1996-04-18
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/600/05600841.pdf
[firstpage_image] =>[orig_patent_app_number] => 639946
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/639946 | Method and apparatus for anticipatory power management for low power data | Apr 17, 1996 | Issued |
Array
(
[id] => 3707724
[patent_doc_number] => 05596728
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-21
[patent_title] => 'Method and apparatus for resolving resource conflicts after a portable computer has docked to an expansion base unit'
[patent_app_type] => 1
[patent_app_number] => 8/632760
[patent_app_country] => US
[patent_app_date] => 1996-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
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[pdf_file] => patents/05/596/05596728.pdf
[firstpage_image] =>[orig_patent_app_number] => 632760
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/632760 | Method and apparatus for resolving resource conflicts after a portable computer has docked to an expansion base unit | Apr 15, 1996 | Issued |
Array
(
[id] => 3759302
[patent_doc_number] => 05754867
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-19
[patent_title] => 'Method for optimizing performance versus power consumption using external/internal clock frequency ratios'
[patent_app_type] => 1
[patent_app_number] => 8/619924
[patent_app_country] => US
[patent_app_date] => 1996-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 1435
[patent_no_of_claims] => 9
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/754/05754867.pdf
[firstpage_image] =>[orig_patent_app_number] => 619924
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/619924 | Method for optimizing performance versus power consumption using external/internal clock frequency ratios | Mar 19, 1996 | Issued |
| 08/607506 | METHOD AND APPARATUS FOR RESUMING THE OPERATION OF A SUSPENDED PROCESSOR IN RESPONSE TO THE RECEIPT OF A PAGTING MESSAGE | Feb 26, 1996 | Abandoned |
Array
(
[id] => 3893964
[patent_doc_number] => 05764933
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-09
[patent_title] => 'Deadlock prevention in a two bridge system by flushing write buffers in the first bridge'
[patent_app_type] => 1
[patent_app_number] => 8/606603
[patent_app_country] => US
[patent_app_date] => 1996-02-26
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[pdf_file] => patents/05/764/05764933.pdf
[firstpage_image] =>[orig_patent_app_number] => 606603
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/606603 | Deadlock prevention in a two bridge system by flushing write buffers in the first bridge | Feb 25, 1996 | Issued |
Array
(
[id] => 3779330
[patent_doc_number] => 05845137
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Method and apparatus for setting the reduced power mode of a processing system in accordance with the type of peripherals connected to the processing system'
[patent_app_type] => 1
[patent_app_number] => 8/605679
[patent_app_country] => US
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[pdf_file] => patents/05/845/05845137.pdf
[firstpage_image] =>[orig_patent_app_number] => 605679
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/605679 | Method and apparatus for setting the reduced power mode of a processing system in accordance with the type of peripherals connected to the processing system | Feb 21, 1996 | Issued |
Array
(
[id] => 3829926
[patent_doc_number] => 05812801
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-22
[patent_title] => 'Apparatus and method for implementing an alternate bus standard in a computer system not designed for the alternate bus standard'
[patent_app_type] => 1
[patent_app_number] => 8/603508
[patent_app_country] => US
[patent_app_date] => 1996-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 3401
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/812/05812801.pdf
[firstpage_image] =>[orig_patent_app_number] => 603508
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/603508 | Apparatus and method for implementing an alternate bus standard in a computer system not designed for the alternate bus standard | Feb 19, 1996 | Issued |
Array
(
[id] => 3759358
[patent_doc_number] => 05754870
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-19
[patent_title] => 'Power management of a computer plug-in card having a remote data link'
[patent_app_type] => 1
[patent_app_number] => 8/602901
[patent_app_country] => US
[patent_app_date] => 1996-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 5757
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/754/05754870.pdf
[firstpage_image] =>[orig_patent_app_number] => 602901
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/602901 | Power management of a computer plug-in card having a remote data link | Feb 15, 1996 | Issued |
Array
(
[id] => 3642668
[patent_doc_number] => 05687381
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'Microprocessor including an interrupt polling unit configured to poll external devices for interrupts using interrupt acknowledge bus transactions'
[patent_app_type] => 1
[patent_app_number] => 8/599603
[patent_app_country] => US
[patent_app_date] => 1996-02-09
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/687/05687381.pdf
[firstpage_image] =>[orig_patent_app_number] => 599603
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/599603 | Microprocessor including an interrupt polling unit configured to poll external devices for interrupts using interrupt acknowledge bus transactions | Feb 8, 1996 | Issued |
Array
(
[id] => 3840010
[patent_doc_number] => 05732281
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-24
[patent_title] => 'Programmable power management circuit for a power supply in a computer system'
[patent_app_type] => 1
[patent_app_number] => 8/597421
[patent_app_country] => US
[patent_app_date] => 1996-02-08
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/732/05732281.pdf
[firstpage_image] =>[orig_patent_app_number] => 597421
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/597421 | Programmable power management circuit for a power supply in a computer system | Feb 7, 1996 | Issued |
Array
(
[id] => 3758248
[patent_doc_number] => 05754797
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-19
[patent_title] => 'Apparatus for allowing smooth hot insertion and removal of a peripheral by gradually applying and removing power to the peripheral'
[patent_app_type] => 1
[patent_app_number] => 8/598105
[patent_app_country] => US
[patent_app_date] => 1996-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => patents/05/754/05754797.pdf
[firstpage_image] =>[orig_patent_app_number] => 598105
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/598105 | Apparatus for allowing smooth hot insertion and removal of a peripheral by gradually applying and removing power to the peripheral | Feb 6, 1996 | Issued |
| 08/556987 | CLOSING METHOD OF DATA PROCESSING AND DATA PROCESSOR | Jan 17, 1996 | Abandoned |
Array
(
[id] => 3813117
[patent_doc_number] => 05828857
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-27
[patent_title] => 'ASIC cell implementation of a bus controller with programmable timing value registers for the apple desktop bus'
[patent_app_type] => 1
[patent_app_number] => 8/583375
[patent_app_country] => US
[patent_app_date] => 1996-01-05
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[firstpage_image] =>[orig_patent_app_number] => 583375
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/583375 | ASIC cell implementation of a bus controller with programmable timing value registers for the apple desktop bus | Jan 4, 1996 | Issued |
| 08/580511 | PCI CARD FOR RECEIVING A GPS SIGNAL | Dec 27, 1995 | Abandoned |
| 08/570426 | BUS MASTER ARBITRATION DESCRIPTOR MECHANISM AND COMPUTER SYSTEM EMPLOYING THE SAME | Dec 10, 1995 | Abandoned |
Array
(
[id] => 3796184
[patent_doc_number] => 05758105
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[patent_kind] => NA
[patent_issue_date] => 1998-05-26
[patent_title] => 'Method and apparatus for bus arbitration between isochronous and non-isochronous devices'
[patent_app_type] => 1
[patent_app_number] => 8/566765
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[firstpage_image] =>[orig_patent_app_number] => 566765
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/566765 | Method and apparatus for bus arbitration between isochronous and non-isochronous devices | Dec 3, 1995 | Issued |
Array
(
[id] => 3854857
[patent_doc_number] => 05708814
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-13
[patent_title] => 'Method and apparatus for reducing the rate of interrupts by generating a single interrupt for a group of events'
[patent_app_type] => 1
[patent_app_number] => 8/561104
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 561104
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/561104 | Method and apparatus for reducing the rate of interrupts by generating a single interrupt for a group of events | Nov 20, 1995 | Issued |
Array
(
[id] => 3811701
[patent_doc_number] => 05781747
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'Method and apparatus for extending the signal path of a peripheral component interconnect bus to a remote location'
[patent_app_type] => 1
[patent_app_number] => 8/557233
[patent_app_country] => US
[patent_app_date] => 1995-11-14
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[pdf_file] => patents/05/781/05781747.pdf
[firstpage_image] =>[orig_patent_app_number] => 557233
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/557233 | Method and apparatus for extending the signal path of a peripheral component interconnect bus to a remote location | Nov 13, 1995 | Issued |
Array
(
[id] => 3854954
[patent_doc_number] => 05708820
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-13
[patent_title] => 'Network hibernation system for suspending and resuming operation of computer system operable in network environment in event of power failure or period of inactivity'
[patent_app_type] => 1
[patent_app_number] => 8/547422
[patent_app_country] => US
[patent_app_date] => 1995-10-25
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[firstpage_image] =>[orig_patent_app_number] => 547422
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/547422 | Network hibernation system for suspending and resuming operation of computer system operable in network environment in event of power failure or period of inactivity | Oct 24, 1995 | Issued |