
Sumati Lefkowitz
Supervisory Patent Examiner (ID: 18486, Phone: (571)272-3638 , Office: P/2666 )
| Most Active Art Unit | 2781 |
| Art Unit(s) | 2112, 2662, 2666, 2189, 2181, 2305, 2781, 2672, 2694, 2629 |
| Total Applications | 516 |
| Issued Applications | 375 |
| Pending Applications | 28 |
| Abandoned Applications | 114 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6265243
[patent_doc_number] => 20020188780
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-12
[patent_title] => 'Method and apparatus for accelerating detection of serial bus device speed signals'
[patent_app_type] => new
[patent_app_number] => 10/214285
[patent_app_country] => US
[patent_app_date] => 2002-08-05
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[pdf_file] => publications/A1/0188/20020188780.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/214285 | Method and apparatus for accelerating detection of serial bus device speed signals | Aug 4, 2002 | Issued |
Array
(
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[patent_doc_number] => 06760849
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[patent_issue_date] => 2004-07-06
[patent_title] => 'Event initiation bus and associated fault protection for a telecommunications device'
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[patent_app_number] => 10/211647
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/211647 | Event initiation bus and associated fault protection for a telecommunications device | Jul 31, 2002 | Issued |
Array
(
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[patent_doc_number] => 06823412
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[patent_issue_date] => 2004-11-23
[patent_title] => 'System and method for arbitration of a plurality of processing modules'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/166216 | System and method for arbitration of a plurality of processing modules | Jun 9, 2002 | Issued |
Array
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[patent_doc_number] => 20020194418
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[patent_issue_date] => 2002-12-19
[patent_title] => 'System for multisized bus coupling in a packet-switched computer system'
[patent_app_type] => new
[patent_app_number] => 10/135555
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/135555 | System for multisized bus coupling in a packet-switched computer system | Apr 29, 2002 | Abandoned |
Array
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[patent_title] => 'Method and apparatus for deprioritizing a high priority client'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/077838 | Method and apparatus for deprioritizing a high priority client | Feb 14, 2002 | Issued |
Array
(
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[patent_issue_date] => 2004-02-10
[patent_title] => 'First-level removable module having bar code I/O and second-level removable memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/036468 | First-level removable module having bar code I/O and second-level removable memory | Jan 6, 2002 | Issued |
Array
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[patent_title] => 'Apparatus and method for supporting multiple graphics adapters in a computer system'
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[patent_app_number] => 10/035253
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/035253 | Apparatus and method for supporting multiple graphics adapters in a computer system | Jan 3, 2002 | Issued |
Array
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[id] => 6762971
[patent_doc_number] => 20030126333
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[patent_issue_date] => 2003-07-03
[patent_title] => 'Daisy chain latency reduction'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/038325 | Daisy chain latency reduction | Jan 1, 2002 | Issued |
Array
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[id] => 7626851
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[patent_title] => 'Enhanced bus architecture for posted read operation between masters and slaves'
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[patent_app_number] => 10/036820
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/036820 | Enhanced bus architecture for posted read operation between masters and slaves | Oct 31, 2001 | Issued |
Array
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[patent_title] => 'Method of interconnecting network components'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/016296 | Method of providing an interface to a plurality of peripheral devices using bus adapter chips | Oct 29, 2001 | Issued |
Array
(
[id] => 6397032
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[patent_title] => 'Method and apparatus for determining connections in a crossbar switch'
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Array
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[id] => 6793381
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Array
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| 09/942818 | Method and apparatus for displaying information in a display screen region identified by permanent printing | Aug 28, 2001 | Abandoned |
Array
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Array
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