| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 1328981
[patent_doc_number] => 06606672
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-08-12
[patent_title] => 'Single-chip-based electronic appliance using a data bus for reading and writing data concurrently'
[patent_app_type] => B1
[patent_app_number] => 09/640014
[patent_app_country] => US
[patent_app_date] => 2000-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3926
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/606/06606672.pdf
[firstpage_image] =>[orig_patent_app_number] => 09640014
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/640014 | Single-chip-based electronic appliance using a data bus for reading and writing data concurrently | Aug 16, 2000 | Issued |
Array
(
[id] => 1336994
[patent_doc_number] => 06604164
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-08-05
[patent_title] => 'Computer'
[patent_app_type] => B1
[patent_app_number] => 09/637392
[patent_app_country] => US
[patent_app_date] => 2000-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1919
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/604/06604164.pdf
[firstpage_image] =>[orig_patent_app_number] => 09637392
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/637392 | Computer | Aug 10, 2000 | Issued |
Array
(
[id] => 1318925
[patent_doc_number] => 06618778
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-09-09
[patent_title] => 'Arbiter for arbitrating between a plurality of requesters and method thereof'
[patent_app_type] => B1
[patent_app_number] => 09/637987
[patent_app_country] => US
[patent_app_date] => 2000-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 18
[patent_no_of_words] => 7337
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/618/06618778.pdf
[firstpage_image] =>[orig_patent_app_number] => 09637987
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/637987 | Arbiter for arbitrating between a plurality of requesters and method thereof | Aug 10, 2000 | Issued |
Array
(
[id] => 1336974
[patent_doc_number] => 06604162
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-08-05
[patent_title] => 'Snoop stall reduction on a microprocessor external bus'
[patent_app_type] => B1
[patent_app_number] => 09/606837
[patent_app_country] => US
[patent_app_date] => 2000-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4608
[patent_no_of_claims] => 46
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/604/06604162.pdf
[firstpage_image] =>[orig_patent_app_number] => 09606837
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/606837 | Snoop stall reduction on a microprocessor external bus | Jun 27, 2000 | Issued |
Array
(
[id] => 7635002
[patent_doc_number] => 06381664
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-30
[patent_title] => 'System for multisized bus coupling in a packet-switched computer system'
[patent_app_type] => B1
[patent_app_number] => 09/597963
[patent_app_country] => US
[patent_app_date] => 2000-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4321
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 5
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/381/06381664.pdf
[firstpage_image] =>[orig_patent_app_number] => 09597963
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/597963 | System for multisized bus coupling in a packet-switched computer system | Jun 19, 2000 | Issued |
Array
(
[id] => 1258305
[patent_doc_number] => 06671759
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-12-30
[patent_title] => 'Apparatus and method for mapping IEEE 1394 node IDS to unchanging node unique IDS to maintain continuity across bus resets'
[patent_app_type] => B1
[patent_app_number] => 09/595210
[patent_app_country] => US
[patent_app_date] => 2000-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 29
[patent_no_of_words] => 9801
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 324
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/671/06671759.pdf
[firstpage_image] =>[orig_patent_app_number] => 09595210
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/595210 | Apparatus and method for mapping IEEE 1394 node IDS to unchanging node unique IDS to maintain continuity across bus resets | Jun 15, 2000 | Issued |
Array
(
[id] => 1356683
[patent_doc_number] => 06591313
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-07-08
[patent_title] => 'Electronic equipment, method of receiving data, method of transmitting data, method of setting channel and method of grouping electronic equipment into channels'
[patent_app_type] => B1
[patent_app_number] => 09/583810
[patent_app_country] => US
[patent_app_date] => 2000-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 19
[patent_no_of_words] => 7030
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/591/06591313.pdf
[firstpage_image] =>[orig_patent_app_number] => 09583810
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/583810 | Electronic equipment, method of receiving data, method of transmitting data, method of setting channel and method of grouping electronic equipment into channels | May 29, 2000 | Issued |
Array
(
[id] => 1291746
[patent_doc_number] => 06643728
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-11-04
[patent_title] => 'Method and apparatus for converting IEEE 1284 signals to or from IEEE 1394 signals'
[patent_app_type] => B1
[patent_app_number] => 09/583662
[patent_app_country] => US
[patent_app_date] => 2000-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8679
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/643/06643728.pdf
[firstpage_image] =>[orig_patent_app_number] => 09583662
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/583662 | Method and apparatus for converting IEEE 1284 signals to or from IEEE 1394 signals | May 29, 2000 | Issued |
Array
(
[id] => 1214322
[patent_doc_number] => 06715022
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-03-30
[patent_title] => 'Unique serial protocol minicking parallel bus'
[patent_app_type] => B1
[patent_app_number] => 09/819054
[patent_app_country] => US
[patent_app_date] => 2000-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 7276
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/715/06715022.pdf
[firstpage_image] =>[orig_patent_app_number] => 09819054
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/819054 | Unique serial protocol minicking parallel bus | May 19, 2000 | Issued |
Array
(
[id] => 1366293
[patent_doc_number] => 06584532
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-06-24
[patent_title] => 'Branch searching to prioritize received interrupt signals'
[patent_app_type] => B1
[patent_app_number] => 09/572729
[patent_app_country] => US
[patent_app_date] => 2000-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 5208
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/584/06584532.pdf
[firstpage_image] =>[orig_patent_app_number] => 09572729
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/572729 | Branch searching to prioritize received interrupt signals | May 16, 2000 | Issued |
Array
(
[id] => 1429178
[patent_doc_number] => 06529989
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-04
[patent_title] => 'Intelligent expansion ROM sharing bus subsystem'
[patent_app_type] => B1
[patent_app_number] => 09/564105
[patent_app_country] => US
[patent_app_date] => 2000-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 5115
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/529/06529989.pdf
[firstpage_image] =>[orig_patent_app_number] => 09564105
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/564105 | Intelligent expansion ROM sharing bus subsystem | May 2, 2000 | Issued |
Array
(
[id] => 7645915
[patent_doc_number] => 06477608
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-11-05
[patent_title] => 'Interface circuit for transferring data on bus between modules of integrated circuit with reduced delay'
[patent_app_type] => B1
[patent_app_number] => 09/557864
[patent_app_country] => US
[patent_app_date] => 2000-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2760
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 10
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/477/06477608.pdf
[firstpage_image] =>[orig_patent_app_number] => 09557864
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/557864 | Interface circuit for transferring data on bus between modules of integrated circuit with reduced delay | Apr 25, 2000 | Issued |
Array
(
[id] => 1339028
[patent_doc_number] => 06601122
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-07-29
[patent_title] => 'Exceptions and interrupts with dynamic priority and vector routing'
[patent_app_type] => B1
[patent_app_number] => 09/550753
[patent_app_country] => US
[patent_app_date] => 2000-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3530
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/601/06601122.pdf
[firstpage_image] =>[orig_patent_app_number] => 09550753
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/550753 | Exceptions and interrupts with dynamic priority and vector routing | Apr 16, 2000 | Issued |
Array
(
[id] => 1234220
[patent_doc_number] => 06697905
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-02-24
[patent_title] => 'Apparatus for providing I/O support to a computer system and method of use thereof'
[patent_app_type] => B1
[patent_app_number] => 09/548585
[patent_app_country] => US
[patent_app_date] => 2000-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2606
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/697/06697905.pdf
[firstpage_image] =>[orig_patent_app_number] => 09548585
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/548585 | Apparatus for providing I/O support to a computer system and method of use thereof | Apr 12, 2000 | Issued |
Array
(
[id] => 1602205
[patent_doc_number] => 06493783
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-12-10
[patent_title] => 'Undocking method for multilayer-dock structure constituted by docking plurality of expansion units to a portable PC'
[patent_app_type] => B1
[patent_app_number] => 09/546795
[patent_app_country] => US
[patent_app_date] => 2000-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4765
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/493/06493783.pdf
[firstpage_image] =>[orig_patent_app_number] => 09546795
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/546795 | Undocking method for multilayer-dock structure constituted by docking plurality of expansion units to a portable PC | Apr 10, 2000 | Issued |
Array
(
[id] => 7633104
[patent_doc_number] => 06658516
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-12-02
[patent_title] => 'Multi-interface memory card and adapter module for the same'
[patent_app_type] => B2
[patent_app_number] => 09/546920
[patent_app_country] => US
[patent_app_date] => 2000-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 2698
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 15
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/658/06658516.pdf
[firstpage_image] =>[orig_patent_app_number] => 09546920
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/546920 | Multi-interface memory card and adapter module for the same | Apr 10, 2000 | Issued |
Array
(
[id] => 1356825
[patent_doc_number] => 06591325
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-07-08
[patent_title] => 'Method and apparatus of out-of-order transaction processing using request side queue pointer and response side queue pointer'
[patent_app_type] => B1
[patent_app_number] => 09/547392
[patent_app_country] => US
[patent_app_date] => 2000-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 9195
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/591/06591325.pdf
[firstpage_image] =>[orig_patent_app_number] => 09547392
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/547392 | Method and apparatus of out-of-order transaction processing using request side queue pointer and response side queue pointer | Apr 10, 2000 | Issued |
Array
(
[id] => 4335663
[patent_doc_number] => 06243821
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-05
[patent_title] => 'System and method for managing power consumption in a computer system'
[patent_app_type] => 1
[patent_app_number] => 9/539588
[patent_app_country] => US
[patent_app_date] => 2000-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 14030
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/243/06243821.pdf
[firstpage_image] =>[orig_patent_app_number] => 539588
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/539588 | System and method for managing power consumption in a computer system | Mar 30, 2000 | Issued |
Array
(
[id] => 1415450
[patent_doc_number] => 06549968
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-04-15
[patent_title] => 'Context transferring between portable computer processor and docking station processor upon docking and undocking'
[patent_app_type] => B1
[patent_app_number] => 09/541045
[patent_app_country] => US
[patent_app_date] => 2000-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1636
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/549/06549968.pdf
[firstpage_image] =>[orig_patent_app_number] => 09541045
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/541045 | Context transferring between portable computer processor and docking station processor upon docking and undocking | Mar 30, 2000 | Issued |
| 09/531279 | Method and system for a multi-phase net refresh on a bus bridge interconnect | Mar 17, 2000 | Abandoned |