Search

Sun J. Lin

Examiner (ID: 4860)

Most Active Art Unit
2851
Art Unit(s)
2825, 2851
Total Applications
1569
Issued Applications
1451
Pending Applications
15
Abandoned Applications
105

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14699045 [patent_doc_number] => 10377250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => System and method of controlling charge of vehicle battery [patent_app_type] => utility [patent_app_number] => 15/792272 [patent_app_country] => US [patent_app_date] => 2017-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5813 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15792272 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/792272
System and method of controlling charge of vehicle battery Oct 23, 2017 Issued
Array ( [id] => 15790353 [patent_doc_number] => 10628904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Electric vehicle rescue system [patent_app_type] => utility [patent_app_number] => 15/792147 [patent_app_country] => US [patent_app_date] => 2017-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1792 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15792147 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/792147
Electric vehicle rescue system Oct 23, 2017 Issued
Array ( [id] => 13900517 [patent_doc_number] => 20190039463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => INTELLIGENT COIL CONTROL FOR VEHICLE WIRELESS POWER TRANSFER (WPT) [patent_app_type] => utility [patent_app_number] => 15/790308 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6804 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790308 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/790308
Intelligent coil control for vehicle wireless power transfer (WPT) Oct 22, 2017 Issued
Array ( [id] => 14212557 [patent_doc_number] => 20190118663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => AUTOMATIC LATERAL ALIGNMENT FOR WIRELESS CHARGING SYSTEMS [patent_app_type] => utility [patent_app_number] => 15/790898 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9303 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790898 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/790898
Automatic lateral alignment for wireless charging systems Oct 22, 2017 Issued
Array ( [id] => 13900531 [patent_doc_number] => 20190039470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => INTELLIGENT VEHICLE CONTROL FOR WIRELESS POWER TRANSFER (WPT) [patent_app_type] => utility [patent_app_number] => 15/790687 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9119 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790687 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/790687
Intelligent vehicle control for wireless power transfer (WPT) Oct 22, 2017 Issued
Array ( [id] => 14222421 [patent_doc_number] => 20190123595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => INTELLIGENT WIRELESS CHARGING SYSTEM [patent_app_type] => utility [patent_app_number] => 15/790213 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11845 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790213 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/790213
Intelligent wireless charging system Oct 22, 2017 Issued
Array ( [id] => 12180788 [patent_doc_number] => 20180039724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-08 [patent_title] => 'Method and Apparatus for Verifying Structural Correctness in Retimed Circuits' [patent_app_type] => utility [patent_app_number] => 15/790009 [patent_app_country] => US [patent_app_date] => 2017-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 16491 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790009 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/790009
Method and apparatus for verifying structural correctness in retimed circuits Oct 21, 2017 Issued
Array ( [id] => 14135031 [patent_doc_number] => 20190101905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => GENERATING RISK INVENTORY AND COMMON PROCESS WINDOW FOR ADJUSTMENT OF MANUFACTURING TOOL [patent_app_type] => utility [patent_app_number] => 15/719680 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15719680 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/719680
Generating risk inventory and common process window for adjustment of manufacturing tool Sep 28, 2017 Issued
Array ( [id] => 15312787 [patent_doc_number] => 10521097 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-31 [patent_title] => User interface to implement topology integrity throughout routing implementations [patent_app_type] => utility [patent_app_number] => 15/721648 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 6152 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15721648 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/721648
User interface to implement topology integrity throughout routing implementations Sep 28, 2017 Issued
Array ( [id] => 13292103 [patent_doc_number] => 10157247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Method and apparatus for performing rewind structural verification of retimed circuits driven by a plurality of clocks [patent_app_type] => utility [patent_app_number] => 15/718424 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 21606 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15718424 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/718424
Method and apparatus for performing rewind structural verification of retimed circuits driven by a plurality of clocks Sep 27, 2017 Issued
Array ( [id] => 12140334 [patent_doc_number] => 20180018416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'Method and Apparatus for Reducing Constraints During Rewind Structural Verification of Retimed Circuits' [patent_app_type] => utility [patent_app_number] => 15/718375 [patent_app_country] => US [patent_app_date] => 2017-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 23029 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15718375 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/718375
Method and apparatus for reducing constraints during rewind structural verification of retimed circuits Sep 27, 2017 Issued
Array ( [id] => 14521725 [patent_doc_number] => 10338113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Authentication, authorization, and/or accounting of power-consuming devices [patent_app_type] => utility [patent_app_number] => 15/716697 [patent_app_country] => US [patent_app_date] => 2017-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8497 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15716697 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/716697
Authentication, authorization, and/or accounting of power-consuming devices Sep 26, 2017 Issued
Array ( [id] => 14107245 [patent_doc_number] => 20190095298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => AUTOMATED ANALOG FAULT INJECTION [patent_app_type] => utility [patent_app_number] => 15/713090 [patent_app_country] => US [patent_app_date] => 2017-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8670 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15713090 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/713090
Automated analog fault injection Sep 21, 2017 Issued
Array ( [id] => 15887671 [patent_doc_number] => 10650181 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Spatial location of vias in a printed circuit board [patent_app_type] => utility [patent_app_number] => 15/711900 [patent_app_country] => US [patent_app_date] => 2017-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 6876 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15711900 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/711900
Spatial location of vias in a printed circuit board Sep 20, 2017 Issued
Array ( [id] => 14426879 [patent_doc_number] => 10318243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Integrated circuit design [patent_app_type] => utility [patent_app_number] => 15/711054 [patent_app_country] => US [patent_app_date] => 2017-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 9324 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15711054 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/711054
Integrated circuit design Sep 20, 2017 Issued
Array ( [id] => 14601681 [patent_doc_number] => 10354033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Mapping application functional blocks to multi-core processors [patent_app_type] => utility [patent_app_number] => 15/711740 [patent_app_country] => US [patent_app_date] => 2017-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10847 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15711740 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/711740
Mapping application functional blocks to multi-core processors Sep 20, 2017 Issued
Array ( [id] => 14736389 [patent_doc_number] => 10387594 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-20 [patent_title] => Increasing available flip-flop count for placement of a circuit design in programmable logic and circuitry therefor [patent_app_type] => utility [patent_app_number] => 15/707897 [patent_app_country] => US [patent_app_date] => 2017-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11853 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15707897 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/707897
Increasing available flip-flop count for placement of a circuit design in programmable logic and circuitry therefor Sep 17, 2017 Issued
Array ( [id] => 13244147 [patent_doc_number] => 10135291 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Method for charging one or more electronic devices and charging device therefor [patent_app_type] => utility [patent_app_number] => 15/707448 [patent_app_country] => US [patent_app_date] => 2017-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 12816 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15707448 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/707448
Method for charging one or more electronic devices and charging device therefor Sep 17, 2017 Issued
Array ( [id] => 13200005 [patent_doc_number] => 10114921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-30 [patent_title] => Method and recording medium of reducing chemoepitaxy directed self-assembled defects [patent_app_type] => utility [patent_app_number] => 15/697594 [patent_app_country] => US [patent_app_date] => 2017-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 6060 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15697594 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/697594
Method and recording medium of reducing chemoepitaxy directed self-assembled defects Sep 6, 2017 Issued
Array ( [id] => 13171297 [patent_doc_number] => 10101761 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-16 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/695868 [patent_app_country] => US [patent_app_date] => 2017-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 9466 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15695868 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/695868
Semiconductor device Sep 4, 2017 Issued
Menu