Sun J. Lin

Array ( [id] => 9707539 [patent_doc_number] => 08832635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'Simulation of circuits with repetitive elements' [patent_app_type] => utility [patent_app_number] => 13/709499 [patent_app_country] => US [patent_app_date] => 2012-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6260 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13709499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10432410 [patent_doc_number] => 20150317422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'SEQUENTIAL STRUCTURE EXTRACTION BY FUNCTIONAL SPECIFICATION' [patent_app_type] => utility [patent_app_number] => 14/648693 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7301 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14648693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12088247 [patent_doc_number] => 09841977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-12 [patent_title] => 'Processor core arrangement, computing system and methods for designing and operating a processor core arrangement' [patent_app_type] => utility [patent_app_number] => 14/646988 [patent_app_country] => US [patent_app_date] => 2012-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5233 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14646988 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9417017 [patent_doc_number] => 08701069 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-04-15 [patent_title] => 'Systems and methods for optimizing allocation of hardware resources to control logic in parallel pipelined hardware' [patent_app_type] => utility [patent_app_number] => 13/683769 [patent_app_country] => US [patent_app_date] => 2012-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 16190 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13683769 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9665994 [patent_doc_number] => 08813004 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-19 [patent_title] => 'Analog fault visualization system and method for circuit designs' [patent_app_type] => utility [patent_app_number] => 13/683889 [patent_app_country] => US [patent_app_date] => 2012-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3158 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13683889 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11246925 [patent_doc_number] => 09472976 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Storage battery device and charging control method' [patent_app_type] => utility [patent_app_number] => 14/366698 [patent_app_country] => US [patent_app_date] => 2012-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6136 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14366698 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9156933 [patent_doc_number] => 08589847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'Circuits and methods for programmable transistor array' [patent_app_type] => utility [patent_app_number] => 13/674800 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 7027 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674800 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9458723 [patent_doc_number] => 08719750 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-05-06 [patent_title] => 'Placement and routing of a circuit design' [patent_app_type] => utility [patent_app_number] => 13/674889 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5222 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674889 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9156933 [patent_doc_number] => 08589847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'Circuits and methods for programmable transistor array' [patent_app_type] => utility [patent_app_number] => 13/674800 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 7027 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674800 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9302280 [patent_doc_number] => 08650524 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-02-11 [patent_title] => 'Method and apparatus for low-pin count testing of integrated circuits' [patent_app_type] => utility [patent_app_number] => 13/673579 [patent_app_country] => US [patent_app_date] => 2012-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 11053 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13673579 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9652374 [patent_doc_number] => 08806410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Power balanced pipelines' [patent_app_type] => utility [patent_app_number] => 13/662929 [patent_app_country] => US [patent_app_date] => 2012-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 37 [patent_no_of_words] => 13037 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13662929 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10860887 [patent_doc_number] => 08887105 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-11-11 [patent_title] => 'Calibration pattern selection based on noise sensitivity' [patent_app_type] => utility [patent_app_number] => 13/662239 [patent_app_country] => US [patent_app_date] => 2012-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9057 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13662239 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8669015 [patent_doc_number] => 20130043553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'DUMMY FILL TO REDUCE SHALLOW TRENCH ISOLATION (STI) STRESS VARIATION ON TRANSISTOR PERFORMANCE' [patent_app_type] => utility [patent_app_number] => 13/658098 [patent_app_country] => US [patent_app_date] => 2012-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3678 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13658098 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9666008 [patent_doc_number] => 08813018 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-19 [patent_title] => 'Method and apparatus for automatically configuring memory size' [patent_app_type] => utility [patent_app_number] => 13/646559 [patent_app_country] => US [patent_app_date] => 2012-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6507 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13646559 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8826347 [patent_doc_number] => 20130127392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'Systems and Methods for transformation and transportation of energy storage devices' [patent_app_type] => utility [patent_app_number] => 13/573806 [patent_app_country] => US [patent_app_date] => 2012-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10498 [patent_no_of_claims] => 78 [patent_no_of_ind_claims] => 57 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13573806 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8948124 [patent_doc_number] => 20130193904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-01 [patent_title] => 'Charging unit useful to transform a high plurality of Energy Storage Devices' [patent_app_type] => utility [patent_app_number] => 13/573757 [patent_app_country] => US [patent_app_date] => 2012-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10231 [patent_no_of_claims] => 88 [patent_no_of_ind_claims] => 71 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13573757 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9266991 [patent_doc_number] => 20140021907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'Wireless energy transfer' [patent_app_type] => utility [patent_app_number] => 13/573725 [patent_app_country] => US [patent_app_date] => 2012-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3758 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13573725 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8892902 [patent_doc_number] => 20130166086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'Systems and devices for transformation and distribution of energy storage devices' [patent_app_type] => utility [patent_app_number] => 13/573796 [patent_app_country] => US [patent_app_date] => 2012-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11553 [patent_no_of_claims] => 91 [patent_no_of_ind_claims] => 72 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13573796 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10107196 [patent_doc_number] => 09142981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Cell balance control unit' [patent_app_type] => utility [patent_app_number] => 13/633215 [patent_app_country] => US [patent_app_date] => 2012-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4439 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13633215 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10022785 [patent_doc_number] => 09065280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-23 [patent_title] => 'System and method of using high energy battery packs' [patent_app_type] => utility [patent_app_number] => 13/633419 [patent_app_country] => US [patent_app_date] => 2012-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5703 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13633419 [rel_patent_id] =>[rel_patent_doc_number] =>)