Search

Sun Jae Yoo

Examiner (ID: 5581, Phone: (571)272-9074 , Office: P/1626 )

Most Active Art Unit
1626
Art Unit(s)
1626, 1621, 1609, 1622
Total Applications
1919
Issued Applications
1171
Pending Applications
215
Abandoned Applications
564

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18768546 [patent_doc_number] => 11818970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Resistive random access memory device [patent_app_type] => utility [patent_app_number] => 17/881419 [patent_app_country] => US [patent_app_date] => 2022-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7465 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17881419 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/881419
Resistive random access memory device Aug 3, 2022 Issued
Array ( [id] => 18024373 [patent_doc_number] => 20220375872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => PATTERNING A TRANSPARENT WAFER TO FORM AN ALIGNMENT MARK IN THE TRANSPARENT WAFER [patent_app_type] => utility [patent_app_number] => 17/880862 [patent_app_country] => US [patent_app_date] => 2022-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11999 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880862 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880862
Patterning a transparent wafer to form an alignment mark in the transparent wafer Aug 3, 2022 Issued
Array ( [id] => 18240167 [patent_doc_number] => 20230072478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => INSULATED GATE BIPOLAR TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/878812 [patent_app_country] => US [patent_app_date] => 2022-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878812 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/878812
Insulated gate bipolar transistor Jul 31, 2022 Issued
Array ( [id] => 18943480 [patent_doc_number] => 20240038619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => THERMALLY ENHANCED EMBEDDED DIE PACKAGE [patent_app_type] => utility [patent_app_number] => 17/876621 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876621 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876621
Thermally enhanced embedded die package Jul 28, 2022 Issued
Array ( [id] => 18945650 [patent_doc_number] => 20240040789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICES, SYSTEMS, AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/876311 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9246 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876311 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876311
Three-dimensional memory devices, systems, and methods for forming the same Jul 27, 2022 Issued
Array ( [id] => 17993370 [patent_doc_number] => 20220359407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => INTEGRATED FAN-OUT PACKAGE [patent_app_type] => utility [patent_app_number] => 17/872002 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4635 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872002 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872002
Integrated fan-out package Jul 24, 2022 Issued
Array ( [id] => 17993338 [patent_doc_number] => 20220359375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => Semiconductor Devices Including Decoupling Capacitors [patent_app_type] => utility [patent_app_number] => 17/812887 [patent_app_country] => US [patent_app_date] => 2022-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17812887 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/812887
Semiconductor devices including decoupling capacitors Jul 14, 2022 Issued
Array ( [id] => 18898617 [patent_doc_number] => 20240014102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/811833 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5116 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17811833 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/811833
Semiconductor device and method of forming the same Jul 10, 2022 Issued
Array ( [id] => 18882936 [patent_doc_number] => 20240006305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => INTEGRATED CIRCUIT STRUCTURES HAVING AIRGAPS FOR BACKSIDE SIGNAL ROUTING OR POWER DELIVERY [patent_app_type] => utility [patent_app_number] => 17/855017 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855017 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855017
Integrated circuit structures having airgaps for backside signal routing or power delivery Jun 29, 2022 Issued
Array ( [id] => 18883009 [patent_doc_number] => 20240006378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => MULTIPLE COMPOSITION THERMAL INTERFACE MATERIALS FOR MULTI-DIE PACKAGES [patent_app_type] => utility [patent_app_number] => 17/855145 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11482 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855145 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855145
MULTIPLE COMPOSITION THERMAL INTERFACE MATERIALS FOR MULTI-DIE PACKAGES Jun 29, 2022 Pending
Array ( [id] => 18882885 [patent_doc_number] => 20240006254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => VOLTAGE CONTRAST SCAN AREA ON A WAFER [patent_app_type] => utility [patent_app_number] => 17/855636 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7533 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855636 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855636
VOLTAGE CONTRAST SCAN AREA ON A WAFER Jun 29, 2022 Pending
Array ( [id] => 20134068 [patent_doc_number] => 12376399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Sensor package structure [patent_app_type] => utility [patent_app_number] => 17/852384 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852384 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852384
Sensor package structure Jun 28, 2022 Issued
Array ( [id] => 18865889 [patent_doc_number] => 20230420326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => HIGH-MOBILITY-ELECTRON TRANSISTORS HAVING HEAT DISSIPATING STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/808110 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17808110 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/808110
High-mobility-electron transistors having heat dissipating structures Jun 21, 2022 Issued
Array ( [id] => 18967524 [patent_doc_number] => 11901305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Method for fabricating semiconductor structure having alignment mark feature [patent_app_type] => utility [patent_app_number] => 17/838375 [patent_app_country] => US [patent_app_date] => 2022-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 4996 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17838375 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/838375
Method for fabricating semiconductor structure having alignment mark feature Jun 12, 2022 Issued
Array ( [id] => 20360159 [patent_doc_number] => 12476164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Semiconductor package and method [patent_app_type] => utility [patent_app_number] => 17/806532 [patent_app_country] => US [patent_app_date] => 2022-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 26 [patent_no_of_words] => 3573 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806532 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/806532
Semiconductor package and method Jun 12, 2022 Issued
Array ( [id] => 18833841 [patent_doc_number] => 20230402368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => TECHNOLOGIES FOR THIN FILM RESISTORS IN VIAS [patent_app_type] => utility [patent_app_number] => 17/837732 [patent_app_country] => US [patent_app_date] => 2022-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10708 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17837732 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/837732
TECHNOLOGIES FOR THIN FILM RESISTORS IN VIAS Jun 9, 2022 Pending
Array ( [id] => 18040085 [patent_doc_number] => 20220384302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => Printed Micro and Nanostructured Arrays for Thermal Management of Electronic Devices [patent_app_type] => utility [patent_app_number] => 17/828551 [patent_app_country] => US [patent_app_date] => 2022-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5058 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17828551 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/828551
Printed micro and nanostructured arrays for thermal management of electronic devices May 30, 2022 Issued
Array ( [id] => 19610930 [patent_doc_number] => 12159811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Lidded microelectronic device packages and related systems, apparatus, and methods of manufacture [patent_app_type] => utility [patent_app_number] => 17/804492 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 11551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17804492 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/804492
Lidded microelectronic device packages and related systems, apparatus, and methods of manufacture May 26, 2022 Issued
Array ( [id] => 17855466 [patent_doc_number] => 20220285509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/825542 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17825542 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/825542
Nonvolatile semiconductor memory device including a memory cell May 25, 2022 Issued
Array ( [id] => 17870896 [patent_doc_number] => 20220293633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/825619 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13476 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17825619 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/825619
Three-dimensional semiconductor memory devices having a vertical semiconductor pattern May 25, 2022 Issued
Menu