Search

Sung Il Cho

Examiner (ID: 9242, Phone: (571)270-0137 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825
Total Applications
653
Issued Applications
535
Pending Applications
76
Abandoned Applications
52

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20047017 [patent_doc_number] => 20250185239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => ANTI-FUSE DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 19/043856 [patent_app_country] => US [patent_app_date] => 2025-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12034 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19043856 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/043856
ANTI-FUSE DEVICE AND METHOD Feb 2, 2025 Pending
Array ( [id] => 20002074 [patent_doc_number] => 20250140296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => MEMORY DEVICE WITH A BIAS CIRCUIT [patent_app_type] => utility [patent_app_number] => 19/011055 [patent_app_country] => US [patent_app_date] => 2025-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1148 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19011055 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/011055
MEMORY DEVICE WITH A BIAS CIRCUIT Jan 5, 2025 Pending
Array ( [id] => 20409784 [patent_doc_number] => 20250378893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-11 [patent_title] => METHOD OF OPERATING NONVOLATILE MEMORY DEVICE AND NONVOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 19/005393 [patent_app_country] => US [patent_app_date] => 2024-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10271 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19005393 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/005393
METHOD OF OPERATING NONVOLATILE MEMORY DEVICE AND NONVOLATILE MEMORY DEVICE Dec 29, 2024 Pending
Array ( [id] => 19865980 [patent_doc_number] => 20250104766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => TIMING CONTROL CIRCUIT OF MEMORY DEVICE WITH TRACKING WORD LINE AND TRACKING BIT LINE [patent_app_type] => utility [patent_app_number] => 18/973630 [patent_app_country] => US [patent_app_date] => 2024-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18973630 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/973630
TIMING CONTROL CIRCUIT OF MEMORY DEVICE WITH TRACKING WORD LINE AND TRACKING BIT LINE Dec 8, 2024 Pending
Array ( [id] => 19865979 [patent_doc_number] => 20250104765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => TIMING CONTROL CIRCUIT OF MEMORY DEVICE WITH TRACKING WORD LINE AND TRACKING BIT LINE [patent_app_type] => utility [patent_app_number] => 18/973508 [patent_app_country] => US [patent_app_date] => 2024-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18973508 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/973508
TIMING CONTROL CIRCUIT OF MEMORY DEVICE WITH TRACKING WORD LINE AND TRACKING BIT LINE Dec 8, 2024 Pending
Array ( [id] => 19850374 [patent_doc_number] => 20250095725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => MEMORY DEVICE WITH SIGNAL EDGE SHARPENER CIRCUITRY [patent_app_type] => utility [patent_app_number] => 18/967206 [patent_app_country] => US [patent_app_date] => 2024-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18967206 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/967206
MEMORY DEVICE WITH SIGNAL EDGE SHARPENER CIRCUITRY Dec 2, 2024 Pending
Array ( [id] => 20019308 [patent_doc_number] => 20250157530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => LOW-POWER STATIC RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 18/953318 [patent_app_country] => US [patent_app_date] => 2024-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18953318 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/953318
LOW-POWER STATIC RANDOM ACCESS MEMORY Nov 19, 2024 Pending
Array ( [id] => 19788262 [patent_doc_number] => 20250061941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => Circuitry for Power Management Assertion [patent_app_type] => utility [patent_app_number] => 18/937191 [patent_app_country] => US [patent_app_date] => 2024-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18937191 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/937191
Circuitry for Power Management Assertion Nov 4, 2024 Pending
Array ( [id] => 19749206 [patent_doc_number] => 20250037771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => MEMORY SYSTEM HAVING SEMICONDUCTOR MEMORY DEVICE THAT PERFORMS VERIFY OPERATIONS USING VARIOUS VERIFY VOLTAGES [patent_app_type] => utility [patent_app_number] => 18/918966 [patent_app_country] => US [patent_app_date] => 2024-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 334 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18918966 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/918966
MEMORY SYSTEM HAVING SEMICONDUCTOR MEMORY DEVICE THAT PERFORMS VERIFY OPERATIONS USING VARIOUS VERIFY VOLTAGES Oct 16, 2024 Pending
Array ( [id] => 19765736 [patent_doc_number] => 12224035 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-02-11 [patent_title] => Device for receiving single-ended signal of light emitting diode control card and forwarding as differential signals [patent_app_type] => utility [patent_app_number] => 18/911618 [patent_app_country] => US [patent_app_date] => 2024-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3200 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 495 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18911618 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/911618
Device for receiving single-ended signal of light emitting diode control card and forwarding as differential signals Oct 9, 2024 Issued
Array ( [id] => 20923810 [patent_doc_number] => 12718876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-25 [patent_title] => Field-programmable gate array (FPGA) configurable cell with P and N pass gates to same bit line [patent_app_type] => utility [patent_app_number] => 18/911727 [patent_app_country] => US [patent_app_date] => 2024-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2546 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 491 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18911727 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/911727
Field-Programmable Gate Array (FPGA) Configurable Cell with P and N Pass Gates to Same Bit Line Oct 9, 2024 Pending
Array ( [id] => 19865966 [patent_doc_number] => 20250104752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE, SYSTEM ON CHIP USING THE MEMORY DEVICE AND RELATED METHODS, AND COMPUTER PROGRAM PRODUCTS THEREOF [patent_app_type] => utility [patent_app_number] => 18/829587 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829587 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/829587
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE, SYSTEM ON CHIP USING THE MEMORY DEVICE AND RELATED METHODS, AND COMPUTER PROGRAM PRODUCTS THEREOF Sep 9, 2024 Pending
Array ( [id] => 19687736 [patent_doc_number] => 20250006281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => PROGRAM CONTINUATION STRATEGIES AFTER MEMORY DEVICE POWER LOSS [patent_app_type] => utility [patent_app_number] => 18/829440 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11858 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829440 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/829440
PROGRAM CONTINUATION STRATEGIES AFTER MEMORY DEVICE POWER LOSS Sep 9, 2024 Pending
Array ( [id] => 19906332 [patent_doc_number] => 12283344 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-04-22 [patent_title] => Electronic device with buffered operation engine and method for performing calculation using same [patent_app_type] => utility [patent_app_number] => 18/823046 [patent_app_country] => US [patent_app_date] => 2024-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2358 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18823046 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/823046
Electronic device with buffered operation engine and method for performing calculation using same Sep 2, 2024 Issued
Array ( [id] => 19604439 [patent_doc_number] => 20240395319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => SERIAL WORD LINE ACTUATION WITH LINKED SOURCE VOLTAGE SUPPLY MODULATION FOR AN IN-MEMORY COMPUTE OPERATION WHERE SIMULTANEOUS ACCESS IS MADE TO PLURAL ROWS OF A STATIC RANDOM ACCESS MEMORY (SRAM) [patent_app_type] => utility [patent_app_number] => 18/791901 [patent_app_country] => US [patent_app_date] => 2024-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8630 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791901 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/791901
SERIAL WORD LINE ACTUATION WITH LINKED SOURCE VOLTAGE SUPPLY MODULATION FOR AN IN-MEMORY COMPUTE OPERATION WHERE SIMULTANEOUS ACCESS IS MADE TO PLURAL ROWS OF A STATIC RANDOM ACCESS MEMORY (SRAM) Jul 31, 2024 Pending
Array ( [id] => 19589392 [patent_doc_number] => 20240386949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/789195 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9942 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789195 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/789195
MEMORY DEVICE AND METHOD OF OPERATING THE SAME Jul 29, 2024 Pending
Array ( [id] => 19560061 [patent_doc_number] => 20240371853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => MEMORY CELL ARRAY AND METHOD OF OPERATING SAME [patent_app_type] => utility [patent_app_number] => 18/771863 [patent_app_country] => US [patent_app_date] => 2024-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15520 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18771863 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/771863
MEMORY CELL ARRAY AND METHOD OF OPERATING SAME Jul 11, 2024 Pending
Array ( [id] => 19546122 [patent_doc_number] => 20240363158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => MEMORY DEVICE INCLUDING DUAL CONTROL CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/769407 [patent_app_country] => US [patent_app_date] => 2024-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18769407 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/769407
MEMORY DEVICE INCLUDING DUAL CONTROL CIRCUITS Jul 10, 2024 Pending
Array ( [id] => 19531482 [patent_doc_number] => 20240355384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => NEW WAS CELL FOR SRAM HIGH-R ISSUE IN ADVANCED TECHNOLOGY NODE [patent_app_type] => utility [patent_app_number] => 18/758504 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12533 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18758504 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/758504
NEW WAS CELL FOR SRAM HIGH-R ISSUE IN ADVANCED TECHNOLOGY NODE Jun 27, 2024 Pending
Array ( [id] => 20448118 [patent_doc_number] => 20260004842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-01 [patent_title] => CIRCUIT FOR MULTIPORT REGISTER FILE [patent_app_type] => utility [patent_app_number] => 18/755149 [patent_app_country] => US [patent_app_date] => 2024-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3479 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18755149 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/755149
CIRCUIT FOR MULTIPORT REGISTER FILE Jun 25, 2024 Pending
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