
Sung Il Cho
Examiner (ID: 13560, Phone: (571)270-0137 , Office: P/2825 )
| Most Active Art Unit | 2825 |
| Art Unit(s) | 2825 |
| Total Applications | 629 |
| Issued Applications | 517 |
| Pending Applications | 85 |
| Abandoned Applications | 50 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17590483
[patent_doc_number] => 11328758
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-10
[patent_title] => Magnetic memory, and programming control method, reading method, and magnetic storage device of the magnetic memory
[patent_app_type] => utility
[patent_app_number] => 17/022701
[patent_app_country] => US
[patent_app_date] => 2020-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4574
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17022701
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/022701 | Magnetic memory, and programming control method, reading method, and magnetic storage device of the magnetic memory | Sep 15, 2020 | Issued |
Array
(
[id] => 16528474
[patent_doc_number] => 20200402555
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-24
[patent_title] => SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD OF SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/012723
[patent_app_country] => US
[patent_app_date] => 2020-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8307
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17012723
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/012723 | Semiconductor memory device and operating method of semiconductor memory device to reduce duty errors | Sep 3, 2020 | Issued |
Array
(
[id] => 16528491
[patent_doc_number] => 20200402572
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-24
[patent_title] => Pre-Charging Bit Lines Through Charge-Sharing
[patent_app_type] => utility
[patent_app_number] => 17/010901
[patent_app_country] => US
[patent_app_date] => 2020-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6329
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17010901
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/010901 | Pre-charging bit lines through charge-sharing | Sep 2, 2020 | Issued |
Array
(
[id] => 16691873
[patent_doc_number] => 20210074352
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-11
[patent_title] => ADJUSTMENT METHOD
[patent_app_type] => utility
[patent_app_number] => 17/011634
[patent_app_country] => US
[patent_app_date] => 2020-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5899
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17011634
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/011634 | Method of adjusting a read margin of a memory and corresponding device | Sep 2, 2020 | Issued |
Array
(
[id] => 17847707
[patent_doc_number] => 11437091
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-06
[patent_title] => SRAM with robust charge-transfer sense amplification
[patent_app_type] => utility
[patent_app_number] => 17/008476
[patent_app_country] => US
[patent_app_date] => 2020-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5553
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17008476
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/008476 | SRAM with robust charge-transfer sense amplification | Aug 30, 2020 | Issued |
Array
(
[id] => 16528503
[patent_doc_number] => 20200402584
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-24
[patent_title] => NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING IN THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/007767
[patent_app_country] => US
[patent_app_date] => 2020-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13666
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17007767
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/007767 | Nonvolatile memory device and method of programming in the same | Aug 30, 2020 | Issued |
Array
(
[id] => 17500445
[patent_doc_number] => 11289155
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-03-29
[patent_title] => Semiconductor memory device with write assist control
[patent_app_type] => utility
[patent_app_number] => 17/007360
[patent_app_country] => US
[patent_app_date] => 2020-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 10149
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17007360
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/007360 | Semiconductor memory device with write assist control | Aug 30, 2020 | Issued |
Array
(
[id] => 16691880
[patent_doc_number] => 20210074359
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-11
[patent_title] => SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/004272
[patent_app_country] => US
[patent_app_date] => 2020-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7640
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004272
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/004272 | Semiconductor flash memory device with voltage control on completion of a program operation and subsequent to completion of the program operation | Aug 26, 2020 | Issued |
Array
(
[id] => 17447866
[patent_doc_number] => 20220068371
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-03
[patent_title] => PSEUDO-TRIPLE-PORT SRAM
[patent_app_type] => utility
[patent_app_number] => 17/001993
[patent_app_country] => US
[patent_app_date] => 2020-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7463
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17001993
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/001993 | Pseudo-triple-port SRAM | Aug 24, 2020 | Issued |
Array
(
[id] => 17447867
[patent_doc_number] => 20220068372
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-03
[patent_title] => MEMORY DEVICE WITH WORD LINE PULSE RECOVERY
[patent_app_type] => utility
[patent_app_number] => 17/002473
[patent_app_country] => US
[patent_app_date] => 2020-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13623
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002473
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/002473 | Memory device with word line pulse recovery | Aug 24, 2020 | Issued |
Array
(
[id] => 16509367
[patent_doc_number] => 20200388623
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-10
[patent_title] => Three-Dimensional Static Random Access Memory Device Structures
[patent_app_type] => utility
[patent_app_number] => 17/000445
[patent_app_country] => US
[patent_app_date] => 2020-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4348
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000445
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/000445 | Three-dimensional static random access memory device structures | Aug 23, 2020 | Issued |
Array
(
[id] => 17971121
[patent_doc_number] => 11488668
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-01
[patent_title] => Semiconductor device and healthcare system
[patent_app_type] => utility
[patent_app_number] => 16/994878
[patent_app_country] => US
[patent_app_date] => 2020-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 46
[patent_no_of_words] => 26938
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16994878
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/994878 | Semiconductor device and healthcare system | Aug 16, 2020 | Issued |
Array
(
[id] => 16471406
[patent_doc_number] => 20200372944
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-26
[patent_title] => PARALLEL ACCESS TECHNIQUES WITHIN MEMORY SECTIONS THROUGH SECTION INDEPENDENCE
[patent_app_type] => utility
[patent_app_number] => 16/993675
[patent_app_country] => US
[patent_app_date] => 2020-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11668
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16993675
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/993675 | Parallel access techniques within memory sections through section independence | Aug 13, 2020 | Issued |
Array
(
[id] => 17978410
[patent_doc_number] => 11495282
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-08
[patent_title] => Sense amplifier drivers, and related devices, systems, and methods
[patent_app_type] => utility
[patent_app_number] => 16/991290
[patent_app_country] => US
[patent_app_date] => 2020-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 32
[patent_no_of_words] => 11254
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16991290
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/991290 | Sense amplifier drivers, and related devices, systems, and methods | Aug 11, 2020 | Issued |
Array
(
[id] => 17416805
[patent_doc_number] => 20220051709
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-17
[patent_title] => ROW-WISE TRACKING OF REFERENCE GENERATION FOR MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/990441
[patent_app_country] => US
[patent_app_date] => 2020-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3184
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16990441
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/990441 | ROW-WISE TRACKING OF REFERENCE GENERATION FOR MEMORY DEVICES | Aug 10, 2020 | Abandoned |
Array
(
[id] => 18639264
[patent_doc_number] => 11763880
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-19
[patent_title] => Column multiplexer circuitry
[patent_app_type] => utility
[patent_app_number] => 16/990951
[patent_app_country] => US
[patent_app_date] => 2020-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7813
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16990951
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/990951 | Column multiplexer circuitry | Aug 10, 2020 | Issued |
Array
(
[id] => 18304239
[patent_doc_number] => 11626151
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-04-11
[patent_title] => Single plate configuration and memory array operation
[patent_app_type] => utility
[patent_app_number] => 16/983469
[patent_app_country] => US
[patent_app_date] => 2020-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 16916
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 250
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16983469
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/983469 | Single plate configuration and memory array operation | Aug 2, 2020 | Issued |
Array
(
[id] => 16440136
[patent_doc_number] => 20200357463
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-12
[patent_title] => CIRCUIT AND METHOD OF WRITING TO A BIT CELL
[patent_app_type] => utility
[patent_app_number] => 16/940315
[patent_app_country] => US
[patent_app_date] => 2020-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8846
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16940315
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/940315 | Circuit and method of writing to a bit cell | Jul 26, 2020 | Issued |
Array
(
[id] => 17622960
[patent_doc_number] => 11342019
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-24
[patent_title] => Compensation word line driver
[patent_app_type] => utility
[patent_app_number] => 16/937824
[patent_app_country] => US
[patent_app_date] => 2020-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8603
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16937824
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/937824 | Compensation word line driver | Jul 23, 2020 | Issued |
Array
(
[id] => 18190429
[patent_doc_number] => 11581030
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-14
[patent_title] => Resistive memory with adjustable write parameter
[patent_app_type] => utility
[patent_app_number] => 16/932984
[patent_app_country] => US
[patent_app_date] => 2020-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5112
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16932984
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/932984 | Resistive memory with adjustable write parameter | Jul 19, 2020 | Issued |