Search

Sung Il Cho

Examiner (ID: 10363, Phone: (571)270-0137 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825
Total Applications
626
Issued Applications
511
Pending Applications
97
Abandoned Applications
50

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17024093 [patent_doc_number] => 20210247964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => MEMORY DEVICE AND METHOD FOR GENERATING RANDOM BIT STREAM WITH CONFIGURABLE RATIO OF BIT VALUES [patent_app_type] => utility [patent_app_number] => 16/787023 [patent_app_country] => US [patent_app_date] => 2020-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6116 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16787023 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/787023
Memory device and method for generating random bit stream with configurable ratio of bit values Feb 10, 2020 Issued
Array ( [id] => 15938541 [patent_doc_number] => 20200160904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/751427 [patent_app_country] => US [patent_app_date] => 2020-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6063 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16751427 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/751427
Semiconductor memory device Jan 23, 2020 Issued
Array ( [id] => 15938539 [patent_doc_number] => 20200160903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/751392 [patent_app_country] => US [patent_app_date] => 2020-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6063 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16751392 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/751392
Semiconductor memory device Jan 23, 2020 Issued
Array ( [id] => 15905453 [patent_doc_number] => 20200152247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => Marching Memory, A Bidirectional Marching Memory, A Complex Marching Memory And A Computer System, Without The Memory Bottleneck [patent_app_type] => utility [patent_app_number] => 16/744849 [patent_app_country] => US [patent_app_date] => 2020-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 51580 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744849 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/744849
Marching memory, a bidirectional marching memory, a complex marching memory and a computer system, without the memory bottleneck Jan 15, 2020 Issued
Array ( [id] => 16803107 [patent_doc_number] => 10998058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Adjustment circuit for partitioned memory block [patent_app_type] => utility [patent_app_number] => 16/736267 [patent_app_country] => US [patent_app_date] => 2020-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7472 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16736267 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/736267
Adjustment circuit for partitioned memory block Jan 6, 2020 Issued
Array ( [id] => 19610784 [patent_doc_number] => 12159664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Concurrent memory access operations [patent_app_type] => utility [patent_app_number] => 16/709665 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13142 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16709665 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/709665
Concurrent memory access operations Dec 9, 2019 Issued
Array ( [id] => 17365820 [patent_doc_number] => 11232849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-25 [patent_title] => Memory device with a repair match mechanism and methods for operating the same [patent_app_type] => utility [patent_app_number] => 16/701671 [patent_app_country] => US [patent_app_date] => 2019-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8946 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16701671 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/701671
Memory device with a repair match mechanism and methods for operating the same Dec 2, 2019 Issued
Array ( [id] => 15624933 [patent_doc_number] => 20200082871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => COMPARISON OPERATIONS IN MEMORY [patent_app_type] => utility [patent_app_number] => 16/681523 [patent_app_country] => US [patent_app_date] => 2019-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33000 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16681523 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/681523
Comparison operations in memory Nov 11, 2019 Issued
Array ( [id] => 16495528 [patent_doc_number] => 10861575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Memory with a controllable I/O functional unit [patent_app_type] => utility [patent_app_number] => 16/666164 [patent_app_country] => US [patent_app_date] => 2019-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4463 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16666164 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/666164
Memory with a controllable I/O functional unit Oct 27, 2019 Issued
Array ( [id] => 16080151 [patent_doc_number] => 20200194062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => CIRCUIT STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/655253 [patent_app_country] => US [patent_app_date] => 2019-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16655253 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/655253
Circuit structure for obtaining critical word line voltage Oct 16, 2019 Issued
Array ( [id] => 16315825 [patent_doc_number] => 20200294563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => SEMICONDUCTOR APPARATUS [patent_app_type] => utility [patent_app_number] => 16/599757 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5913 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16599757 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/599757
Semiconductor apparatus capable of controlling the timing of data and control signals related to data input/output Oct 10, 2019 Issued
Array ( [id] => 16601287 [patent_doc_number] => 20210027818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => MEMORY DEVICE HAVING HARDWARE REGULATION TRAINING [patent_app_type] => utility [patent_app_number] => 16/595847 [patent_app_country] => US [patent_app_date] => 2019-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16595847 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/595847
Memory device having hardware regulation training Oct 7, 2019 Issued
Array ( [id] => 15775169 [patent_doc_number] => 20200118602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => POWER SWITCH CONTROL IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/594779 [patent_app_country] => US [patent_app_date] => 2019-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16594779 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/594779
Power switch control in a memory device Oct 6, 2019 Issued
Array ( [id] => 16637787 [patent_doc_number] => 10916301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Data storage device and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/584344 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 10942 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16584344 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/584344
Data storage device and operating method thereof Sep 25, 2019 Issued
Array ( [id] => 16723494 [patent_doc_number] => 20210090641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => IMPRINT RECOVERY FOR MEMORY ARRAYS [patent_app_type] => utility [patent_app_number] => 16/581005 [patent_app_country] => US [patent_app_date] => 2019-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 65957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16581005 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/581005
Imprint recovery for memory arrays Sep 23, 2019 Issued
Array ( [id] => 15872945 [patent_doc_number] => 20200143876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => SEMICONDUCTOR DEVICE AND DATA RETENTION METHOD [patent_app_type] => utility [patent_app_number] => 16/577465 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11553 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16577465 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/577465
Semiconductor device and data retention method Sep 19, 2019 Issued
Array ( [id] => 17332211 [patent_doc_number] => 11222679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-11 [patent_title] => Packaged integrated circuit having a photodiode and a resistive memory [patent_app_type] => utility [patent_app_number] => 16/573075 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4893 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573075 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573075
Packaged integrated circuit having a photodiode and a resistive memory Sep 16, 2019 Issued
Array ( [id] => 16332009 [patent_doc_number] => 20200302975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => NONVOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/570507 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 471 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570507 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570507
Nonvolatile memory device including memory element in equal cross-sectional area of word lines and bit lines Sep 12, 2019 Issued
Array ( [id] => 17353185 [patent_doc_number] => 11227832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-18 [patent_title] => Semiconductor memory device having a memory cell and semiconductor layer [patent_app_type] => utility [patent_app_number] => 16/564584 [patent_app_country] => US [patent_app_date] => 2019-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 15287 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16564584 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/564584
Semiconductor memory device having a memory cell and semiconductor layer Sep 8, 2019 Issued
Array ( [id] => 16653166 [patent_doc_number] => 10930357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Semiconductor storage device having a temperature sensor that generates a temperature signal based on which applied voltages are generated [patent_app_type] => utility [patent_app_number] => 16/556047 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 10863 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556047 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/556047
Semiconductor storage device having a temperature sensor that generates a temperature signal based on which applied voltages are generated Aug 28, 2019 Issued
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