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Sung Il Cho

Examiner (ID: 9242, Phone: (571)270-0137 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825
Total Applications
653
Issued Applications
535
Pending Applications
76
Abandoned Applications
52

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20448118 [patent_doc_number] => 20260004842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-01 [patent_title] => CIRCUIT FOR MULTIPORT REGISTER FILE [patent_app_type] => utility [patent_app_number] => 18/755149 [patent_app_country] => US [patent_app_date] => 2024-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3479 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18755149 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/755149
CIRCUIT FOR MULTIPORT REGISTER FILE Jun 25, 2024 Pending
Array ( [id] => 20153156 [patent_doc_number] => 20250252994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => MEMORY CIRCUITS AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/748972 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1189 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18748972 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/748972
MEMORY CIRCUITS AND METHODS FOR OPERATING THE SAME Jun 19, 2024 Pending
Array ( [id] => 20409766 [patent_doc_number] => 20250378875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-11 [patent_title] => Device and Method for Reading a Memory Cell [patent_app_type] => utility [patent_app_number] => 18/739538 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18739538 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/739538
Device and Method for Reading a Memory Cell Jun 10, 2024 Pending
Array ( [id] => 19634330 [patent_doc_number] => 20240412779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => PRE-CHARGE SYSTEM FOR PERFORMING TIME-DIVISION PRE-CHARGE UPON BIT-LINE GROUPS OF MEMORY ARRAY AND ASSOCIATED PRE-CHARGE METHOD [patent_app_type] => utility [patent_app_number] => 18/739363 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18739363 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/739363
PRE-CHARGE SYSTEM FOR PERFORMING TIME-DIVISION PRE-CHARGE UPON BIT-LINE GROUPS OF MEMORY ARRAY AND ASSOCIATED PRE-CHARGE METHOD Jun 10, 2024 Pending
Array ( [id] => 19483710 [patent_doc_number] => 20240331752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/737111 [patent_app_country] => US [patent_app_date] => 2024-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7963 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18737111 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/737111
Semiconductor device with power-down signal generation Jun 6, 2024 Issued
Array ( [id] => 19467661 [patent_doc_number] => 20240321331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/737192 [patent_app_country] => US [patent_app_date] => 2024-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18737192 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/737192
SEMICONDUCTOR DEVICES Jun 6, 2024 Pending
Array ( [id] => 20396657 [patent_doc_number] => 20250372132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => DUAL LATCH FLIP FLOP DEVICE [patent_app_type] => utility [patent_app_number] => 18/678885 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18678885 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/678885
DUAL LATCH FLIP FLOP DEVICE May 29, 2024 Pending
Array ( [id] => 20961194 [patent_doc_number] => 12731637 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-09-08 [patent_title] => Multi-port static random-access memory (SRAM) with buffered read port and p and n pass gates to same write bit line [patent_app_type] => utility [patent_app_number] => 18/671872 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 1355 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 553 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671872 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/671872
Multi-Port Static Random-Access Memory (SRAM) with Buffered Read Port and P and N Pass Gates to Same Write Bit Line May 21, 2024 Pending
Array ( [id] => 19986747 [patent_doc_number] => 20250124969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => MEMORY DEVICES AND OPERATING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/669633 [patent_app_country] => US [patent_app_date] => 2024-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18669633 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/669633
MEMORY DEVICES AND OPERATING METHODS THEREOF May 20, 2024 Pending
Array ( [id] => 20758855 [patent_doc_number] => 12651632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-09 [patent_title] => Memory cell with dynamic disturb reduction [patent_app_type] => utility [patent_app_number] => 18/670401 [patent_app_country] => US [patent_app_date] => 2024-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 31 [patent_no_of_words] => 6187 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18670401 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/670401
Memory cell with dynamic disturb reduction May 20, 2024 Issued
Array ( [id] => 19893059 [patent_doc_number] => 20250118371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => STORAGE DEVICE FOR SELECTIVELY PERFORMING HIGH-RELIABILITY PROGRAM OPERATION ACCORDING TO TEMPERATURE, AND OPERATION METHOD OF THE STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/666874 [patent_app_country] => US [patent_app_date] => 2024-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13084 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18666874 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/666874
Storage device for selectively performing high-reliability program operation according to temperature, and operation method of the storage device May 16, 2024 Issued
Array ( [id] => 19589365 [patent_doc_number] => 20240386922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => COMPUTE-IN-MEMORY CIRCUIT BASED ON CHARGE REDISTRIBUTION, AND CONTROL METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/666427 [patent_app_country] => US [patent_app_date] => 2024-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18666427 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/666427
Compute-in-memory circuit based on charge redistribution, and control method thereof May 15, 2024 Issued
Array ( [id] => 20352510 [patent_doc_number] => 20250349362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => NON-VOLATILE MEMORY WITH REDUCED NEIGHBOR WORD LINE INTERFERENCE [patent_app_type] => utility [patent_app_number] => 18/662619 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662619 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662619
NON-VOLATILE MEMORY WITH REDUCED NEIGHBOR WORD LINE INTERFERENCE May 12, 2024 Pending
Array ( [id] => 19604464 [patent_doc_number] => 20240395344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => MITIGATION OF CHARGE-LOSS IN SUSPENDED PROGRAM STATE IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/662962 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662962 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662962
MITIGATION OF CHARGE-LOSS IN SUSPENDED PROGRAM STATE IN A MEMORY DEVICE May 12, 2024 Pending
Array ( [id] => 19406870 [patent_doc_number] => 20240290381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => STATIC RANDOM ACCESS MEMORY WITH ADAPTIVE PRECHARGE SIGNAL GENERATED IN RESPONSE TO TRACKING OPERATION [patent_app_type] => utility [patent_app_number] => 18/649590 [patent_app_country] => US [patent_app_date] => 2024-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16072 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18649590 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/649590
Static random access memory with adaptive precharge signal generated in response to tracking operation Apr 28, 2024 Issued
Array ( [id] => 19559640 [patent_doc_number] => 20240371432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => SENSE AMPLIFIER FOR ACTIVE STANDBY OPERATION [patent_app_type] => utility [patent_app_number] => 18/643674 [patent_app_country] => US [patent_app_date] => 2024-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5329 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18643674 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/643674
SENSE AMPLIFIER FOR ACTIVE STANDBY OPERATION Apr 22, 2024 Pending
Array ( [id] => 19634326 [patent_doc_number] => 20240412775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => COMPARISON OPERATIONS IN MEMORY [patent_app_type] => utility [patent_app_number] => 18/640966 [patent_app_country] => US [patent_app_date] => 2024-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33078 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18640966 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/640966
Comparison operations in memory Apr 18, 2024 Issued
Array ( [id] => 19392497 [patent_doc_number] => 20240282367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => MEMORY DEVICE USING A PLURALITY OF SUPPLY VOLTAGES AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/639330 [patent_app_country] => US [patent_app_date] => 2024-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9413 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18639330 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/639330
Memory device using a plurality of supply voltages and operating method thereof Apr 17, 2024 Issued
Array ( [id] => 19531481 [patent_doc_number] => 20240355383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => DELTA-SIGMA MODULATOR-BASED VARIABLE-RESOLUTION ACTIVATION IN-MEMORY COMPUTING MACRO [patent_app_type] => utility [patent_app_number] => 18/637823 [patent_app_country] => US [patent_app_date] => 2024-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18637823 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/637823
DELTA-SIGMA MODULATOR-BASED VARIABLE-RESOLUTION ACTIVATION IN-MEMORY COMPUTING MACRO Apr 16, 2024 Pending
Array ( [id] => 20297620 [patent_doc_number] => 20250322863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => VOLTAGE CALIBRATION FOR WRITE OPERATION [patent_app_type] => utility [patent_app_number] => 18/637174 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18637174 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/637174
VOLTAGE CALIBRATION FOR WRITE OPERATION Apr 15, 2024 Pending
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