Search

Sung Il Cho

Examiner (ID: 13560, Phone: (571)270-0137 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825
Total Applications
629
Issued Applications
517
Pending Applications
85
Abandoned Applications
50

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14109621 [patent_doc_number] => 20190096486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/923229 [patent_app_country] => US [patent_app_date] => 2018-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15923229 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/923229
Semiconductor memory device Mar 15, 2018 Issued
Array ( [id] => 14875911 [patent_doc_number] => 20190288197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => RESISTIVE MEMORY DEVICE HAVING OHMIC CONTACTS [patent_app_type] => utility [patent_app_number] => 15/924043 [patent_app_country] => US [patent_app_date] => 2018-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15007 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15924043 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/924043
Resistive memory device having ohmic contacts Mar 15, 2018 Issued
Array ( [id] => 14078849 [patent_doc_number] => 20190088312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/908449 [patent_app_country] => US [patent_app_date] => 2018-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15908449 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/908449
Semiconductor memory device Feb 27, 2018 Issued
Array ( [id] => 14888661 [patent_doc_number] => 10424377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Semiconductor integrated circuit having programmable logic device and resistive change elements [patent_app_type] => utility [patent_app_number] => 15/907711 [patent_app_country] => US [patent_app_date] => 2018-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 11807 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 804 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15907711 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/907711
Semiconductor integrated circuit having programmable logic device and resistive change elements Feb 27, 2018 Issued
Array ( [id] => 13995173 [patent_doc_number] => 20190066744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 15/907745 [patent_app_country] => US [patent_app_date] => 2018-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15907745 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/907745
Semiconductor storage device Feb 27, 2018 Issued
Array ( [id] => 14078857 [patent_doc_number] => 20190088316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => RESISTANCE CHANGE TYPE MEMORY [patent_app_type] => utility [patent_app_number] => 15/906453 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15906453 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/906453
Resistance change type memory Feb 26, 2018 Issued
Array ( [id] => 13933307 [patent_doc_number] => 20190050169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 15/905827 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14244 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15905827 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/905827
Semiconductor storage device Feb 26, 2018 Issued
Array ( [id] => 15580771 [patent_doc_number] => 10580779 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Vertical transistor static random access memory cell [patent_app_type] => utility [patent_app_number] => 15/903203 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 5058 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903203 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/903203
Vertical transistor static random access memory cell Feb 22, 2018 Issued
Array ( [id] => 12868480 [patent_doc_number] => 20180181335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => APPARATUS AND METHOD TO SPEED UP MEMORY FREQUENCY SWITCH FLOW [patent_app_type] => utility [patent_app_number] => 15/902002 [patent_app_country] => US [patent_app_date] => 2018-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6612 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15902002 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/902002
APPARATUS AND METHOD TO SPEED UP MEMORY FREQUENCY SWITCH FLOW Feb 21, 2018 Abandoned
Array ( [id] => 13527885 [patent_doc_number] => 20180315485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => DEVICE, SYSTEM, AND METHOD FOR REDUCING PROGRAM DISTURB IN MULTIPLE-TIME PROGRAMMABLE CELL ARRAY [patent_app_type] => utility [patent_app_number] => 15/902957 [patent_app_country] => US [patent_app_date] => 2018-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9907 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15902957 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/902957
Device, system, and method for reducing program disturb in multiple-time programmable cell array Feb 21, 2018 Issued
Array ( [id] => 14491587 [patent_doc_number] => 10332591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => SRAM margin recovery during burn-in [patent_app_type] => utility [patent_app_number] => 15/902065 [patent_app_country] => US [patent_app_date] => 2018-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5458 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 606 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15902065 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/902065
SRAM margin recovery during burn-in Feb 21, 2018 Issued
Array ( [id] => 14557709 [patent_doc_number] => 10347322 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-09 [patent_title] => Apparatuses having memory strings compared to one another through a sense amplifier [patent_app_type] => utility [patent_app_number] => 15/900403 [patent_app_country] => US [patent_app_date] => 2018-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6053 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 491 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15900403 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/900403
Apparatuses having memory strings compared to one another through a sense amplifier Feb 19, 2018 Issued
Array ( [id] => 14827409 [patent_doc_number] => 10410715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Pre-charging bit lines through charge-sharing [patent_app_type] => utility [patent_app_number] => 15/896247 [patent_app_country] => US [patent_app_date] => 2018-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15896247 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/896247
Pre-charging bit lines through charge-sharing Feb 13, 2018 Issued
Array ( [id] => 16811782 [patent_doc_number] => 20210134337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => CONTROL CIRCUIT, SEMICONDUCTOR MEMORY DEVICE, INFORMATION PROCESSING DEVICE, AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 16/491928 [patent_app_country] => US [patent_app_date] => 2018-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6524 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16491928 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/491928
Control circuit, semiconductor memory device, information processing device, and control method Feb 13, 2018 Issued
Array ( [id] => 12800026 [patent_doc_number] => 20180158511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/887190 [patent_app_country] => US [patent_app_date] => 2018-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8731 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15887190 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/887190
Semiconductor SRAM circuit having a plurality of MOSFETS controlling ground potential Feb 1, 2018 Issued
Array ( [id] => 15732885 [patent_doc_number] => 10614875 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Logical operations using memory cells [patent_app_type] => utility [patent_app_number] => 15/884179 [patent_app_country] => US [patent_app_date] => 2018-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8341 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15884179 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/884179
Logical operations using memory cells Jan 29, 2018 Issued
Array ( [id] => 13270819 [patent_doc_number] => 10147496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-04 [patent_title] => OTPROM for post-process programming using selective breakdown [patent_app_type] => utility [patent_app_number] => 15/881356 [patent_app_country] => US [patent_app_date] => 2018-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5654 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15881356 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/881356
OTPROM for post-process programming using selective breakdown Jan 25, 2018 Issued
Array ( [id] => 15092587 [patent_doc_number] => 20190341105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => METHOD FOR USING ELECTROCHEMICAL COMPONENTS FOR STORAGE OF ENERGY AND INFORMATION AND ASSOCIATED ELECTRONIC CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/475195 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5965 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16475195 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/475195
Method for using electrochemical components for storage of energy and information and associated electronic circuit Dec 21, 2017 Issued
Array ( [id] => 16249211 [patent_doc_number] => 10748583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Dummy bitline circuitry [patent_app_type] => utility [patent_app_number] => 15/851341 [patent_app_country] => US [patent_app_date] => 2017-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4639 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15851341 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/851341
Dummy bitline circuitry Dec 20, 2017 Issued
Array ( [id] => 15139003 [patent_doc_number] => 10482983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Read disturb detection based on dynamic bit error rate estimation [patent_app_type] => utility [patent_app_number] => 15/850273 [patent_app_country] => US [patent_app_date] => 2017-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 6704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15850273 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/850273
Read disturb detection based on dynamic bit error rate estimation Dec 20, 2017 Issued
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