
Sung Il Cho
Examiner (ID: 10363, Phone: (571)270-0137 , Office: P/2825 )
| Most Active Art Unit | 2825 |
| Art Unit(s) | 2825 |
| Total Applications | 626 |
| Issued Applications | 511 |
| Pending Applications | 97 |
| Abandoned Applications | 50 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10218613
[patent_doc_number] => 20150103606
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-16
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/198151
[patent_app_country] => US
[patent_app_date] => 2014-03-05
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/198151 | Semiconductor device | Mar 4, 2014 | Issued |
Array
(
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[patent_doc_number] => 20150194602
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[patent_kind] => A1
[patent_issue_date] => 2015-07-09
[patent_title] => 'RRAM RETENTION BY DEPOSITING Ti CAPPING LAYER BEFORE HK HfO'
[patent_app_type] => utility
[patent_app_number] => 14/196416
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/196416 | RRAM retention by depositing Ti capping layer before HK HfO | Mar 3, 2014 | Issued |
Array
(
[id] => 10925092
[patent_doc_number] => 20140328114
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-06
[patent_title] => 'MEMORY DEVICE AND METHOD OF OPERATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/195049
[patent_app_country] => US
[patent_app_date] => 2014-03-03
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/195049 | Memory device and method of operating the same | Mar 2, 2014 | Issued |
Array
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[patent_issue_date] => 2015-06-25
[patent_title] => 'SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/177750
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/176837 | Semiconductor devices and semiconductor systems including the same | Feb 9, 2014 | Issued |
Array
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[patent_issue_date] => 2016-10-18
[patent_title] => 'Method of programming a phase change memory and phase change memory device'
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Array
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[patent_title] => 'SINGLE-LAYER GATE EEPROM CELL, CELL ARRAY INCLUDING THE SAME, AND METHOD OF OPERATING THE CELL ARRAY'
[patent_app_type] => utility
[patent_app_number] => 14/172815
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/172815 | Single-layer gate EEPROM cell, cell array including the same, and method of operating the cell array | Feb 3, 2014 | Issued |
Array
(
[id] => 10321571
[patent_doc_number] => 20150206575
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[patent_title] => 'COUNTER BASED DESIGN FOR TEMPERATURE CONTROLLED REFRESH'
[patent_app_type] => utility
[patent_app_number] => 14/161655
[patent_app_country] => US
[patent_app_date] => 2014-01-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/161655 | Counter based design for temperature controlled refresh | Jan 21, 2014 | Issued |
Array
(
[id] => 9856424
[patent_doc_number] => 20150036441
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[patent_kind] => A1
[patent_issue_date] => 2015-02-05
[patent_title] => 'CURRENT GENERATION CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/161263
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/161263 | Current generation circuit and semiconductor device having the same | Jan 21, 2014 | Issued |
Array
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[id] => 11187313
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[patent_issue_date] => 2016-08-16
[patent_title] => 'Determining and storing bit error rate relationships in spin transfer torque magnetoresistive random-access memory (STT-MRAM)'
[patent_app_type] => utility
[patent_app_number] => 14/159605
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/159605 | Determining and storing bit error rate relationships in spin transfer torque magnetoresistive random-access memory (STT-MRAM) | Jan 20, 2014 | Issued |
Array
(
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Array
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Array
(
[id] => 10277061
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[patent_title] => 'TECHNIQUES TO BOOST WORD-LINE VOLTAGE USING PARASITIC CAPACITANCES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/160396 | Techniques to boost word-line voltage using parasitic capacitances | Jan 20, 2014 | Issued |
Array
(
[id] => 10315001
[patent_doc_number] => 20150200004
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[patent_issue_date] => 2015-07-16
[patent_title] => 'NON-VOLATILE RANDOM ACCESS MEMORY POWER MANAGEMENT USING SELF-REFRESH COMMANDS'
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Array
(
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/137291 | Passive SRAM write assist | Dec 19, 2013 | Issued |