Search

Sung Il Cho

Examiner (ID: 13560, Phone: (571)270-0137 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825
Total Applications
629
Issued Applications
517
Pending Applications
85
Abandoned Applications
50

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19765713 [patent_doc_number] => 12224011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Non-volatile memory with concurrent sub-block programming [patent_app_type] => utility [patent_app_number] => 17/726923 [patent_app_country] => US [patent_app_date] => 2022-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 37 [patent_no_of_words] => 22723 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17726923 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/726923
Non-volatile memory with concurrent sub-block programming Apr 21, 2022 Issued
Array ( [id] => 18669712 [patent_doc_number] => 11776622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Circuit and method of writing to a bit cell [patent_app_type] => utility [patent_app_number] => 17/689788 [patent_app_country] => US [patent_app_date] => 2022-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8056 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17689788 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/689788
Circuit and method of writing to a bit cell Mar 7, 2022 Issued
Array ( [id] => 18615537 [patent_doc_number] => 20230282274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/685188 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9917 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17685188 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/685188
Memory device and method of operating the same Mar 1, 2022 Issued
Array ( [id] => 18585728 [patent_doc_number] => 20230267992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => KEEPER-FREE VOLATILE MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/678799 [patent_app_country] => US [patent_app_date] => 2022-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17678799 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/678799
Keeper-free volatile memory system Feb 22, 2022 Issued
Array ( [id] => 17660447 [patent_doc_number] => 20220180912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => MAGNETIC CACHE FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/677557 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16107 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17677557 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/677557
Magnetic cache for a memory device Feb 21, 2022 Issued
Array ( [id] => 19507639 [patent_doc_number] => 12119068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Program continuation strategies after memory device power loss [patent_app_type] => utility [patent_app_number] => 17/675241 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 11809 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17675241 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/675241
Program continuation strategies after memory device power loss Feb 17, 2022 Issued
Array ( [id] => 17900505 [patent_doc_number] => 20220310167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => LEVEL SHIFTING IN ALL LEVELS PROGRAMMING OF A MEMORY DEVICE IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 17/675447 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17675447 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/675447
Level shifting in all levels programming of a memory device in a memory sub-system Feb 17, 2022 Issued
Array ( [id] => 17645044 [patent_doc_number] => 20220172783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING IN THE SAME [patent_app_type] => utility [patent_app_number] => 17/672122 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17672122 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/672122
Nonvolatile memory device and method of programming in the same Feb 14, 2022 Issued
Array ( [id] => 17615090 [patent_doc_number] => 20220157370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => COMPARISON OPERATIONS IN MEMORY [patent_app_type] => utility [patent_app_number] => 17/589417 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33048 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17589417 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/589417
Comparison operations in memory Jan 30, 2022 Issued
Array ( [id] => 19525603 [patent_doc_number] => 12127361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Modular memory devices [patent_app_type] => utility [patent_app_number] => 17/577393 [patent_app_country] => US [patent_app_date] => 2022-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5536 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17577393 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/577393
Modular memory devices Jan 17, 2022 Issued
Array ( [id] => 17900472 [patent_doc_number] => 20220310134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => SENSE AMPLIFIER, MEMORY, AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 17/647995 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647995 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/647995
Sense amplifier, memory, and control method Jan 13, 2022 Issued
Array ( [id] => 17551641 [patent_doc_number] => 20220122983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => EMBEDDED MEMORY EMPLOYING SELF-ALIGNED TOP-GATED THIN FILM TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/563983 [patent_app_country] => US [patent_app_date] => 2021-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17563983 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/563983
EMBEDDED MEMORY EMPLOYING SELF-ALIGNED TOP-GATED THIN FILM TRANSISTORS Dec 27, 2021 Abandoned
Array ( [id] => 19679076 [patent_doc_number] => 12190947 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Imprint recovery for memory arrays [patent_app_type] => utility [patent_app_number] => 17/562598 [patent_app_country] => US [patent_app_date] => 2021-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 66004 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17562598 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/562598
Imprint recovery for memory arrays Dec 26, 2021 Issued
Array ( [id] => 19244331 [patent_doc_number] => 12014782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Memory device for adjusting magnitude of signal used to precharge bit line according to position of plug hole and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/561228 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 13825 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17561228 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/561228
Memory device for adjusting magnitude of signal used to precharge bit line according to position of plug hole and operating method thereof Dec 22, 2021 Issued
Array ( [id] => 18415840 [patent_doc_number] => 11670385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Method for writing an electrically erasable and programmable non volatile memory and corresponding integrated circuit [patent_app_type] => utility [patent_app_number] => 17/558123 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6870 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558123 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558123
Method for writing an electrically erasable and programmable non volatile memory and corresponding integrated circuit Dec 20, 2021 Issued
Array ( [id] => 18458987 [patent_doc_number] => 20230200269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => STACKED CONDUCTIVE BRIDGE RANDOM ACCESS MEMORY AND ACCESS DEVICES [patent_app_type] => utility [patent_app_number] => 17/554510 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17554510 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/554510
STACKED CONDUCTIVE BRIDGE RANDOM ACCESS MEMORY AND ACCESS DEVICES Dec 16, 2021 Pending
Array ( [id] => 18442372 [patent_doc_number] => 20230189668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => SELF-ALIGNED, SYMMETRIC PHASE CHANGE MEMORY ELEMENT [patent_app_type] => utility [patent_app_number] => 17/644466 [patent_app_country] => US [patent_app_date] => 2021-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17644466 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/644466
SELF-ALIGNED, SYMMETRIC PHASE CHANGE MEMORY ELEMENT Dec 14, 2021 Issued
Array ( [id] => 17691860 [patent_doc_number] => 20220199153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/548989 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4711 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548989 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548989
SEMICONDUCTOR DEVICE Dec 12, 2021 Abandoned
Array ( [id] => 18439700 [patent_doc_number] => 20230186995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => PERFORMING DATA INTEGRITY CHECKS TO IDENTIFY DEFECTIVE WORDLINES [patent_app_type] => utility [patent_app_number] => 17/546425 [patent_app_country] => US [patent_app_date] => 2021-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17546425 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/546425
Performing data integrity checks to identify defective wordlines Dec 8, 2021 Issued
Array ( [id] => 18426179 [patent_doc_number] => 20230180644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => GLOBAL HEATER FOR PHASE CHANGE MEMORY [patent_app_type] => utility [patent_app_number] => 17/545195 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545195 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545195
Global heater for phase change memory Dec 7, 2021 Issued
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