Search

Sunita Reddy

Examiner (ID: 5773, Phone: (571)270-5151 , Office: P/3735 )

Most Active Art Unit
3791
Art Unit(s)
2491, RD00, 3791, 3735
Total Applications
853
Issued Applications
516
Pending Applications
78
Abandoned Applications
279

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19900231 [patent_doc_number] => 12278168 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-04-15 [patent_title] => Semiconductor device including interconnect structure with planarization stop layer [patent_app_type] => utility [patent_app_number] => 18/886289 [patent_app_country] => US [patent_app_date] => 2024-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 35 [patent_no_of_words] => 6611 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18886289 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/886289
Semiconductor device including interconnect structure with planarization stop layer Sep 15, 2024 Issued
Array ( [id] => 19528720 [patent_doc_number] => 20240352622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => LARGE DIAMETER SILICON CARBIDE WAFERS [patent_app_type] => utility [patent_app_number] => 18/762896 [patent_app_country] => US [patent_app_date] => 2024-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18762896 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/762896
Large diameter silicon carbide wafers Jul 2, 2024 Issued
Array ( [id] => 20431176 [patent_doc_number] => 20250393270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-25 [patent_title] => SEMICONDUCTOR DEVICES WITH EPITAXIAL SOURCE/DRAIN REGION WITH A BOTTOM DIELECTRIC LAYER AND METHODS OF FABRICATION THEREOF [patent_app_type] => utility [patent_app_number] => 18/749746 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4282 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749746 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/749746
SEMICONDUCTOR DEVICES WITH EPITAXIAL SOURCE/DRAIN REGION WITH A BOTTOM DIELECTRIC LAYER AND METHODS OF FABRICATION THEREOF Jun 20, 2024 Pending
Array ( [id] => 20213868 [patent_doc_number] => 12410512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Apparatus and method for manufacturing metal gate structures [patent_app_type] => utility [patent_app_number] => 18/746717 [patent_app_country] => US [patent_app_date] => 2024-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9397 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18746717 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/746717
Apparatus and method for manufacturing metal gate structures Jun 17, 2024 Issued
Array ( [id] => 20424570 [patent_doc_number] => 20250386656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => Aerosol Spray Jet Printable Ink Compositions for Redox Gating Materials and Semiconducting Channel Materials [patent_app_type] => utility [patent_app_number] => 18/747338 [patent_app_country] => US [patent_app_date] => 2024-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18747338 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/747338
Aerosol Spray Jet Printable Ink Compositions for Redox Gating Materials and Semiconducting Channel Materials Jun 17, 2024 Pending
Array ( [id] => 19483976 [patent_doc_number] => 20240332018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => Deposition Equipment with Adjustable Temperature Source [patent_app_type] => utility [patent_app_number] => 18/738526 [patent_app_country] => US [patent_app_date] => 2024-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18738526 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/738526
Deposition equipment with adjustable temperature source Jun 9, 2024 Issued
Array ( [id] => 19634532 [patent_doc_number] => 20240412981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => SELECTIVE RUTHENIUM DEPOSITION AND RELATED SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 18/737743 [patent_app_country] => US [patent_app_date] => 2024-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18737743 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/737743
SELECTIVE RUTHENIUM DEPOSITION AND RELATED SYSTEMS AND METHODS Jun 6, 2024 Pending
Array ( [id] => 19646678 [patent_doc_number] => 20240421198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 18/736206 [patent_app_country] => US [patent_app_date] => 2024-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18736206 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/736206
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME Jun 5, 2024 Pending
Array ( [id] => 19701859 [patent_doc_number] => 12195875 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Laser processing system integrated with MBE device [patent_app_type] => utility [patent_app_number] => 18/670872 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7577 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 623 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18670872 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/670872
Laser processing system integrated with MBE device May 21, 2024 Issued
Array ( [id] => 19420961 [patent_doc_number] => 20240297085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => POWER ALARM AND FIRE LOADING RISK REDUCTION FOR A DEPOSITION TOOL [patent_app_type] => utility [patent_app_number] => 18/663776 [patent_app_country] => US [patent_app_date] => 2024-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5170 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663776 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/663776
POWER ALARM AND FIRE LOADING RISK REDUCTION FOR A DEPOSITION TOOL May 13, 2024 Pending
Array ( [id] => 20210843 [patent_doc_number] => 20250280563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-04 [patent_title] => EMBEDDED HIGH-VOLTAGE SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/631088 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18631088 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/631088
EMBEDDED HIGH-VOLTAGE SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF Apr 9, 2024 Pending
Array ( [id] => 19714585 [patent_doc_number] => 20250024727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/626132 [patent_app_country] => US [patent_app_date] => 2024-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13093 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626132 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626132
DISPLAY DEVICE Apr 2, 2024 Pending
Array ( [id] => 19323296 [patent_doc_number] => 20240244844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE AND METHOD OF MAKING THEREOF INCLUDING NON-CONFORMAL SELECTIVE DEPOSITION OF SPACERS IN MEMORY OPENINGS [patent_app_type] => utility [patent_app_number] => 18/621735 [patent_app_country] => US [patent_app_date] => 2024-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18621735 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/621735
THREE-DIMENSIONAL MEMORY DEVICE AND METHOD OF MAKING THEREOF INCLUDING NON-CONFORMAL SELECTIVE DEPOSITION OF SPACERS IN MEMORY OPENINGS Mar 28, 2024 Pending
Array ( [id] => 19321505 [patent_doc_number] => 20240243052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => VERTICALLY SPACED INTRA-LEVEL INTERCONNECT LINE METALLIZATION FOR INTEGRATED CIRCUIT DEVICES [patent_app_type] => utility [patent_app_number] => 18/622500 [patent_app_country] => US [patent_app_date] => 2024-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11310 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622500 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/622500
Vertically spaced intra-level interconnect line metallization for integrated circuit devices Mar 28, 2024 Issued
Array ( [id] => 19305634 [patent_doc_number] => 20240234214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => GATE STRUCTURE AND PATTERNING METHOD [patent_app_type] => utility [patent_app_number] => 18/615403 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8193 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615403 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/615403
GATE STRUCTURE AND PATTERNING METHOD Mar 24, 2024 Pending
Array ( [id] => 20089050 [patent_doc_number] => 20250218986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => METHOD FOR FORMING DEVICE SUBSTRATE, METHOD FOR FORMING PACKAGE STRUCTURE AND PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/600981 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600981 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/600981
METHOD FOR FORMING DEVICE SUBSTRATE, METHOD FOR FORMING PACKAGE STRUCTURE AND PACKAGE STRUCTURE Mar 10, 2024 Pending
Array ( [id] => 19468273 [patent_doc_number] => 20240321943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/601032 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9039 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601032 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/601032
SEMICONDUCTOR MEMORY DEVICE Mar 10, 2024 Pending
Array ( [id] => 19271546 [patent_doc_number] => 20240215253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/601027 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12897 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601027 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/601027
SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME Mar 10, 2024 Pending
Array ( [id] => 19648520 [patent_doc_number] => 20240423040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/600973 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600973 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/600973
DISPLAY DEVICE Mar 10, 2024 Pending
Array ( [id] => 20224674 [patent_doc_number] => 20250287605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => SEMICONDUCTOR DEVICE WITH LOW CURRENT LEAKAGE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/600934 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5581 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600934 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/600934
SEMICONDUCTOR DEVICE WITH LOW CURRENT LEAKAGE AND METHOD FOR MANUFACTURING THE SAME Mar 10, 2024 Pending
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