Search

Suresh Memula

Examiner (ID: 15400, Phone: (571)272-8046 , Office: P/2851 )

Most Active Art Unit
2851
Art Unit(s)
2825, 2851
Total Applications
1436
Issued Applications
1264
Pending Applications
50
Abandoned Applications
139

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15855451 [patent_doc_number] => 10643013 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Tie-high and tie-low circuits [patent_app_type] => utility [patent_app_number] => 15/985007 [patent_app_country] => US [patent_app_date] => 2018-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4211 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15985007 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/985007
Tie-high and tie-low circuits May 20, 2018 Issued
Array ( [id] => 15746727 [patent_doc_number] => 20200112253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => SYSTEMS AND METHODS FOR CHARGING A BATTERY [patent_app_type] => utility [patent_app_number] => 16/614604 [patent_app_country] => US [patent_app_date] => 2018-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6719 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16614604 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/614604
Systems and methods for charging a battery May 17, 2018 Issued
Array ( [id] => 15639281 [patent_doc_number] => 10592634 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-17 [patent_title] => Systems and methods for automatic handling of engineering design parameter violations [patent_app_type] => utility [patent_app_number] => 15/983119 [patent_app_country] => US [patent_app_date] => 2018-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4155 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15983119 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/983119
Systems and methods for automatic handling of engineering design parameter violations May 17, 2018 Issued
Array ( [id] => 13559313 [patent_doc_number] => 20180331204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => Semiconductor Device with Transistor Cells and a Drift Structure and Method of Manufacturing [patent_app_type] => utility [patent_app_number] => 15/979050 [patent_app_country] => US [patent_app_date] => 2018-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10233 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15979050 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/979050
Semiconductor device with transistor cells and a drift structure and method of manufacturing May 13, 2018 Issued
Array ( [id] => 13417939 [patent_doc_number] => 20180260512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => INTEGRATED CIRCUIT LAYOUT DESIGN METHODOLOGY WITH PROCESS VARIATION BANDS [patent_app_type] => utility [patent_app_number] => 15/978044 [patent_app_country] => US [patent_app_date] => 2018-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15978044 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/978044
INTEGRATED CIRCUIT LAYOUT DESIGN METHODOLOGY WITH PROCESS VARIATION BANDS May 10, 2018 Abandoned
Array ( [id] => 13284123 [patent_doc_number] => 10153655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-11 [patent_title] => Multiband wireless power system [patent_app_type] => utility [patent_app_number] => 15/976475 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6261 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976475 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976475
Multiband wireless power system May 9, 2018 Issued
Array ( [id] => 15027603 [patent_doc_number] => 20190324806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => SOFTWARE DEFINED MULTI-DOMAIN CREATION AND ISOLATION FOR A HETEROGENEOUS SYSTEM-ON-CHIP [patent_app_type] => utility [patent_app_number] => 15/956480 [patent_app_country] => US [patent_app_date] => 2018-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956480 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/956480
Software defined multi-domain creation and isolation for a heterogeneous System-on-Chip Apr 17, 2018 Issued
Array ( [id] => 15059497 [patent_doc_number] => 10460055 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-29 [patent_title] => Modeling of sequential circuit devices of multi-clock domain IC design for a transient vectorless power analysis [patent_app_type] => utility [patent_app_number] => 15/955497 [patent_app_country] => US [patent_app_date] => 2018-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15955497 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/955497
Modeling of sequential circuit devices of multi-clock domain IC design for a transient vectorless power analysis Apr 16, 2018 Issued
Array ( [id] => 13497277 [patent_doc_number] => 20180300181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => RECONFIGURABLE PROCESSOR FABRIC IMPLEMENTATION USING SATISFIABILITY ANALYSIS [patent_app_type] => utility [patent_app_number] => 15/953896 [patent_app_country] => US [patent_app_date] => 2018-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15953896 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/953896
Reconfigurable processor fabric implementation using satisfiability analysis Apr 15, 2018 Issued
Array ( [id] => 16488175 [patent_doc_number] => 20200381784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => POWER SUPPLYING DEVICE, POWER STORAGE SYSTEM, AND CHARGING METHOD [patent_app_type] => utility [patent_app_number] => 16/607316 [patent_app_country] => US [patent_app_date] => 2018-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16607316 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/607316
Power supplying device, power storage system, and charging method Mar 29, 2018 Issued
Array ( [id] => 15789227 [patent_doc_number] => 10628338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Selection of a location for installation of a CPU in a compute node using predicted performance scores [patent_app_type] => utility [patent_app_number] => 15/927872 [patent_app_country] => US [patent_app_date] => 2018-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7971 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15927872 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/927872
Selection of a location for installation of a CPU in a compute node using predicted performance scores Mar 20, 2018 Issued
Array ( [id] => 15609883 [patent_doc_number] => 10586005 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-10 [patent_title] => Incremental synthesis for changes to a circuit design [patent_app_type] => utility [patent_app_number] => 15/927846 [patent_app_country] => US [patent_app_date] => 2018-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 11641 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15927846 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/927846
Incremental synthesis for changes to a circuit design Mar 20, 2018 Issued
Array ( [id] => 15232271 [patent_doc_number] => 10503860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Method of creating writing data [patent_app_type] => utility [patent_app_number] => 15/925089 [patent_app_country] => US [patent_app_date] => 2018-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 36 [patent_no_of_words] => 8934 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15925089 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/925089
Method of creating writing data Mar 18, 2018 Issued
Array ( [id] => 14152511 [patent_doc_number] => 10256648 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-09 [patent_title] => Portable device battery charging circuits and methods [patent_app_type] => utility [patent_app_number] => 15/916160 [patent_app_country] => US [patent_app_date] => 2018-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5710 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15916160 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/916160
Portable device battery charging circuits and methods Mar 7, 2018 Issued
Array ( [id] => 15301153 [patent_doc_number] => 20190393712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => WIRELESS CHARGING SYSTEM INCLUDING BOOST CONVERTER AND TRANSMISSION COIL STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/480819 [patent_app_country] => US [patent_app_date] => 2018-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16480819 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/480819
Wireless charging system including boost converter and transmission coil structure Mar 4, 2018 Issued
Array ( [id] => 15592453 [patent_doc_number] => 20200072761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => OBJECT IDENTIFICATION AND COMPARISON [patent_app_type] => utility [patent_app_number] => 16/490091 [patent_app_country] => US [patent_app_date] => 2018-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16490091 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/490091
Object identification and comparison Mar 1, 2018 Issued
Array ( [id] => 14123789 [patent_doc_number] => 10248755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Checking wafer-level integrated designs for antenna rule compliance [patent_app_type] => utility [patent_app_number] => 15/910132 [patent_app_country] => US [patent_app_date] => 2018-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4721 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15910132 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/910132
Checking wafer-level integrated designs for antenna rule compliance Mar 1, 2018 Issued
Array ( [id] => 12892753 [patent_doc_number] => 20180189426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-05 [patent_title] => NETWORK SYNTHESIS DESIGN OF MICROWAVE ACOUSTIC WAVE FILTERS [patent_app_type] => utility [patent_app_number] => 15/908516 [patent_app_country] => US [patent_app_date] => 2018-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15908516 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/908516
Network synthesis design of microwave acoustic wave filters Feb 27, 2018 Issued
Array ( [id] => 15075765 [patent_doc_number] => 10467373 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Method of selecting routing resources in a multi-chip integrated circuit device [patent_app_type] => utility [patent_app_number] => 15/901761 [patent_app_country] => US [patent_app_date] => 2018-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6828 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15901761 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/901761
Method of selecting routing resources in a multi-chip integrated circuit device Feb 20, 2018 Issued
Array ( [id] => 13992945 [patent_doc_number] => 20190065630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => APPARATUS FOR PREDICTING YIELD OF SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME [patent_app_type] => utility [patent_app_number] => 15/901358 [patent_app_country] => US [patent_app_date] => 2018-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15901358 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/901358
Apparatus for predicting yield of semiconductor integrated circuit and method for manufacturing semiconductor device using the same Feb 20, 2018 Issued
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