
Suresh Suryawanshi
Examiner (ID: 4736, Phone: (571)272-3668 , Office: P/2118 )
| Most Active Art Unit | 2116 |
| Art Unit(s) | 2118, 2121, 2116, 2115, 2185 |
| Total Applications | 1546 |
| Issued Applications | 1324 |
| Pending Applications | 89 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 180059
[patent_doc_number] => 07657775
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-02-02
[patent_title] => 'Dynamic memory clock adjustments'
[patent_app_type] => utility
[patent_app_number] => 11/944429
[patent_app_country] => US
[patent_app_date] => 2007-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 5251
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/657/07657775.pdf
[firstpage_image] =>[orig_patent_app_number] => 11944429
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/944429 | Dynamic memory clock adjustments | Nov 21, 2007 | Issued |
Array
(
[id] => 5430261
[patent_doc_number] => 20090089571
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-02
[patent_title] => 'MOTHERBOARD AND START-UP METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 11/941978
[patent_app_country] => US
[patent_app_date] => 2007-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => publications/A1/0089/20090089571.pdf
[firstpage_image] =>[orig_patent_app_number] => 11941978
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/941978 | Motherboard and start-up method utilizing a BIOS bin file and GPIO pins | Nov 18, 2007 | Issued |
Array
(
[id] => 4830122
[patent_doc_number] => 20080126827
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-29
[patent_title] => 'METHOD, APPARATUS, AND PROGRAM FOR MINIMIZING INVALID CACHE NOTIFICATION EVENTS IN A DISTRIBUTED CACHING ENVIRONMENT'
[patent_app_type] => utility
[patent_app_number] => 11/942468
[patent_app_country] => US
[patent_app_date] => 2007-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0126/20080126827.pdf
[firstpage_image] =>[orig_patent_app_number] => 11942468
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/942468 | Method, apparatus, and program for minimizing invalid cache notification events in a distributed caching environment | Nov 18, 2007 | Issued |
Array
(
[id] => 5280702
[patent_doc_number] => 20090132834
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-21
[patent_title] => 'Distributing Integrated Circuit Net Power Accurately in Power and Thermal Analysis'
[patent_app_type] => utility
[patent_app_number] => 11/942030
[patent_app_country] => US
[patent_app_date] => 2007-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0132/20090132834.pdf
[firstpage_image] =>[orig_patent_app_number] => 11942030
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/942030 | Distributing integrated circuit net power accurately in power and thermal analysis | Nov 18, 2007 | Issued |
Array
(
[id] => 4956429
[patent_doc_number] => 20080189453
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-07
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF OPERATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/941169
[patent_app_country] => US
[patent_app_date] => 2007-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 4054
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[pdf_file] => publications/A1/0189/20080189453.pdf
[firstpage_image] =>[orig_patent_app_number] => 11941169
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/941169 | Semiconductor integrated circuit device and method of operating the same | Nov 15, 2007 | Issued |
Array
(
[id] => 7495135
[patent_doc_number] => 08032772
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[patent_kind] => B2
[patent_issue_date] => 2011-10-04
[patent_title] => 'Method, apparatus, and system for optimizing frequency and performance in a multi-die microprocessor'
[patent_app_type] => utility
[patent_app_number] => 11/940958
[patent_app_country] => US
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[pdf_file] => patents/08/032/08032772.pdf
[firstpage_image] =>[orig_patent_app_number] => 11940958
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/940958 | Method, apparatus, and system for optimizing frequency and performance in a multi-die microprocessor | Nov 14, 2007 | Issued |
Array
(
[id] => 5280705
[patent_doc_number] => 20090132837
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-21
[patent_title] => 'System and Method for Dynamically Selecting Clock Frequency'
[patent_app_type] => utility
[patent_app_number] => 11/941021
[patent_app_country] => US
[patent_app_date] => 2007-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0132/20090132837.pdf
[firstpage_image] =>[orig_patent_app_number] => 11941021
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/941021 | System and Method for Dynamically Selecting Clock Frequency | Nov 14, 2007 | Abandoned |
Array
(
[id] => 4522376
[patent_doc_number] => 07917743
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-29
[patent_title] => 'System and method for a remote information handling system boot'
[patent_app_type] => utility
[patent_app_number] => 11/939659
[patent_app_country] => US
[patent_app_date] => 2007-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/07/917/07917743.pdf
[firstpage_image] =>[orig_patent_app_number] => 11939659
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/939659 | System and method for a remote information handling system boot | Nov 13, 2007 | Issued |
Array
(
[id] => 4488359
[patent_doc_number] => 07908469
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[patent_kind] => B2
[patent_issue_date] => 2011-03-15
[patent_title] => 'Method for executing power on self test on a computer system and updating SMBIOS information partially'
[patent_app_type] => utility
[patent_app_number] => 11/985149
[patent_app_country] => US
[patent_app_date] => 2007-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/07/908/07908469.pdf
[firstpage_image] =>[orig_patent_app_number] => 11985149
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/985149 | Method for executing power on self test on a computer system and updating SMBIOS information partially | Nov 12, 2007 | Issued |
Array
(
[id] => 7972161
[patent_doc_number] => 07941659
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-10
[patent_title] => 'External memory enabling a user to select an application program to be launched before launching an operating system'
[patent_app_type] => utility
[patent_app_number] => 11/981958
[patent_app_country] => US
[patent_app_date] => 2007-10-31
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[pdf_file] => patents/07/941/07941659.pdf
[firstpage_image] =>[orig_patent_app_number] => 11981958
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/981958 | External memory enabling a user to select an application program to be launched before launching an operating system | Oct 30, 2007 | Issued |
Array
(
[id] => 355567
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[patent_title] => 'System and method for interleaving point-of-load regulators'
[patent_app_type] => utility
[patent_app_number] => 11/927682
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/927682 | System and method for interleaving point-of-load regulators | Oct 29, 2007 | Issued |
Array
(
[id] => 4793955
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[patent_title] => 'Data processing apparatus and method for controlling a transfer of payload data over a communication channel'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/976606 | Data processing apparatus and method for controlling a transfer of payload data over a communication channel | Oct 24, 2007 | Issued |
Array
(
[id] => 192936
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/873995 | Storage control system and boot control system | Oct 16, 2007 | Issued |
Array
(
[id] => 4530645
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Array
(
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Array
(
[id] => 58617
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/906559 | Apparatus and method to interface two different clock domains | Oct 2, 2007 | Issued |
Array
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[patent_title] => 'Increasing mean time between failures for power supplies'
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/844836 | Method and apparatus for shaping electronic pulses | Aug 23, 2007 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/844449 | Secure power-on reset engine | Aug 23, 2007 | Issued |