Search

Suresh Suryawanshi

Examiner (ID: 4736, Phone: (571)272-3668 , Office: P/2118 )

Most Active Art Unit
2116
Art Unit(s)
2118, 2121, 2116, 2115, 2185
Total Applications
1546
Issued Applications
1324
Pending Applications
89
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4766814 [patent_doc_number] => 20080178026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'COMPUTER SYSTEM AND POWER SAVING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/626622 [patent_app_country] => US [patent_app_date] => 2007-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2174 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20080178026.pdf [firstpage_image] =>[orig_patent_app_number] => 11626622 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/626622
Method and apparatus for asserting a hardware pin to disable a data bus connecting a processor and a chipset during power saving state Jan 23, 2007 Issued
Array ( [id] => 5102860 [patent_doc_number] => 20070186122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Information processing device, and suspending/resuming method of the same' [patent_app_type] => utility [patent_app_number] => 11/654567 [patent_app_country] => US [patent_app_date] => 2007-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2708 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20070186122.pdf [firstpage_image] =>[orig_patent_app_number] => 11654567 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/654567
Information processing device, and suspending/resuming method of the same Jan 17, 2007 Abandoned
Array ( [id] => 4576721 [patent_doc_number] => 07822960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-26 [patent_title] => 'Platform management processor assisted resume' [patent_app_type] => utility [patent_app_number] => 11/644408 [patent_app_country] => US [patent_app_date] => 2006-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3427 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/822/07822960.pdf [firstpage_image] =>[orig_patent_app_number] => 11644408 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/644408
Platform management processor assisted resume Dec 21, 2006 Issued
Array ( [id] => 4877187 [patent_doc_number] => 20080150570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'Over clocking detector' [patent_app_type] => utility [patent_app_number] => 11/644347 [patent_app_country] => US [patent_app_date] => 2006-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2496 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20080150570.pdf [firstpage_image] =>[orig_patent_app_number] => 11644347 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/644347
Over clocking detecting and permitting access to stored over clocking indicator in a power down state Dec 21, 2006 Issued
Array ( [id] => 66515 [patent_doc_number] => 07765417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-27 [patent_title] => 'External control of a multi-mode controller' [patent_app_type] => utility [patent_app_number] => 11/644215 [patent_app_country] => US [patent_app_date] => 2006-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3624 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/765/07765417.pdf [firstpage_image] =>[orig_patent_app_number] => 11644215 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/644215
External control of a multi-mode controller Dec 21, 2006 Issued
Array ( [id] => 37607 [patent_doc_number] => 07793119 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-07 [patent_title] => 'Adaptive voltage scaling with age compensation' [patent_app_type] => utility [patent_app_number] => 11/643194 [patent_app_country] => US [patent_app_date] => 2006-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5829 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/793/07793119.pdf [firstpage_image] =>[orig_patent_app_number] => 11643194 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/643194
Adaptive voltage scaling with age compensation Dec 20, 2006 Issued
Array ( [id] => 4830019 [patent_doc_number] => 20080126784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'Storage apparatus, control method, and control device' [patent_app_type] => utility [patent_app_number] => 11/643216 [patent_app_country] => US [patent_app_date] => 2006-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 11372 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20080126784.pdf [firstpage_image] =>[orig_patent_app_number] => 11643216 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/643216
Storage apparatus, control method, and control device Dec 20, 2006 Abandoned
Array ( [id] => 118286 [patent_doc_number] => 07716515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-11 [patent_title] => 'Method for updating the timing of a baseboard management controller' [patent_app_type] => utility [patent_app_number] => 11/642639 [patent_app_country] => US [patent_app_date] => 2006-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1845 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/716/07716515.pdf [firstpage_image] =>[orig_patent_app_number] => 11642639 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/642639
Method for updating the timing of a baseboard management controller Dec 20, 2006 Issued
Array ( [id] => 5024800 [patent_doc_number] => 20070150767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'Information processing apparatus and power supply control method' [patent_app_type] => utility [patent_app_number] => 11/641697 [patent_app_country] => US [patent_app_date] => 2006-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3493 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20070150767.pdf [firstpage_image] =>[orig_patent_app_number] => 11641697 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/641697
Information processing apparatus and power supply control method Dec 19, 2006 Abandoned
Array ( [id] => 213377 [patent_doc_number] => 07624296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'Method and apparatus for synchronizing multiple direct digital synthesizers (DDSs) across multiple printed circuit assemblies (PCAs)' [patent_app_type] => utility [patent_app_number] => 11/641677 [patent_app_country] => US [patent_app_date] => 2006-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3446 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/624/07624296.pdf [firstpage_image] =>[orig_patent_app_number] => 11641677 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/641677
Method and apparatus for synchronizing multiple direct digital synthesizers (DDSs) across multiple printed circuit assemblies (PCAs) Dec 19, 2006 Issued
Array ( [id] => 76604 [patent_doc_number] => 07757103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-13 [patent_title] => 'Method and apparatus to estimate energy consumed by central processing unit core' [patent_app_type] => utility [patent_app_number] => 11/641952 [patent_app_country] => US [patent_app_date] => 2006-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3018 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/757/07757103.pdf [firstpage_image] =>[orig_patent_app_number] => 11641952 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/641952
Method and apparatus to estimate energy consumed by central processing unit core Dec 19, 2006 Issued
Array ( [id] => 126770 [patent_doc_number] => 07711940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-04 [patent_title] => 'Circuit block and circuit system having skew compensation, and skew compensation method' [patent_app_type] => utility [patent_app_number] => 11/641040 [patent_app_country] => US [patent_app_date] => 2006-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5351 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/711/07711940.pdf [firstpage_image] =>[orig_patent_app_number] => 11641040 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/641040
Circuit block and circuit system having skew compensation, and skew compensation method Dec 18, 2006 Issued
Array ( [id] => 126771 [patent_doc_number] => 07711941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-04 [patent_title] => 'Method and apparatus for booting independent operating systems in a multi-processor core integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/642045 [patent_app_country] => US [patent_app_date] => 2006-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2480 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/711/07711941.pdf [firstpage_image] =>[orig_patent_app_number] => 11642045 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/642045
Method and apparatus for booting independent operating systems in a multi-processor core integrated circuit Dec 18, 2006 Issued
Array ( [id] => 4869017 [patent_doc_number] => 20080148076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-19 [patent_title] => 'Power aware software pipelining for hardware accelerators' [patent_app_type] => utility [patent_app_number] => 11/642128 [patent_app_country] => US [patent_app_date] => 2006-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4097 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20080148076.pdf [firstpage_image] =>[orig_patent_app_number] => 11642128 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/642128
Power aware software pipelining for hardware accelerators Dec 18, 2006 Issued
Array ( [id] => 107840 [patent_doc_number] => 07725758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-25 [patent_title] => 'Multifunctional timer/event counter device and method of using such a device' [patent_app_type] => utility [patent_app_number] => 11/641607 [patent_app_country] => US [patent_app_date] => 2006-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4308 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/725/07725758.pdf [firstpage_image] =>[orig_patent_app_number] => 11641607 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/641607
Multifunctional timer/event counter device and method of using such a device Dec 17, 2006 Issued
Array ( [id] => 5195301 [patent_doc_number] => 20070083786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'Robust and scalable de-skew method for data path skew control' [patent_app_type] => utility [patent_app_number] => 11/637001 [patent_app_country] => US [patent_app_date] => 2006-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7982 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20070083786.pdf [firstpage_image] =>[orig_patent_app_number] => 11637001 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/637001
Method and apparatus for selectively deskewing data traveling through a bus Dec 11, 2006 Issued
Array ( [id] => 379076 [patent_doc_number] => 07313716 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-25 [patent_title] => 'Method and device for exchanging data between at least two stations connected via a bus system' [patent_app_type] => utility [patent_app_number] => 11/636195 [patent_app_country] => US [patent_app_date] => 2006-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4321 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/313/07313716.pdf [firstpage_image] =>[orig_patent_app_number] => 11636195 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/636195
Method and device for exchanging data between at least two stations connected via a bus system Dec 7, 2006 Issued
Array ( [id] => 66785 [patent_doc_number] => 07765554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-27 [patent_title] => 'Context selection and activation mechanism for activating one of a group of inactive contexts in a processor core for servicing interrupts' [patent_app_type] => utility [patent_app_number] => 11/566870 [patent_app_country] => US [patent_app_date] => 2006-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 57 [patent_no_of_words] => 28665 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/765/07765554.pdf [firstpage_image] =>[orig_patent_app_number] => 11566870 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/566870
Context selection and activation mechanism for activating one of a group of inactive contexts in a processor core for servicing interrupts Dec 4, 2006 Issued
Array ( [id] => 5081396 [patent_doc_number] => 20070124620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-31 [patent_title] => 'CAPACITIVE LOAD DRIVING CIRCUIT, ELECTROSTATIC TRANSDUCER, METHOD OF SETTING CIRCUIT CONSTANT, ULTRASONIC SPEAKER, DISPLAY DEVICE, AND DIRECTIONAL ACOUSTIC SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/564651 [patent_app_country] => US [patent_app_date] => 2006-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 17319 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20070124620.pdf [firstpage_image] =>[orig_patent_app_number] => 11564651 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/564651
Capacitive load driving circuit, electrostatic transducer, method of setting circuit constant, ultrasonic speaker, display device, and directional acoustic system Nov 28, 2006 Issued
Array ( [id] => 908607 [patent_doc_number] => 07337341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Computer system and power management method thereof wherein central processing unit does not support the hyper transport technology' [patent_app_type] => utility [patent_app_number] => 11/561924 [patent_app_country] => US [patent_app_date] => 2006-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2572 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/337/07337341.pdf [firstpage_image] =>[orig_patent_app_number] => 11561924 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/561924
Computer system and power management method thereof wherein central processing unit does not support the hyper transport technology Nov 20, 2006 Issued
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