
Suresh Suryawanshi
Examiner (ID: 4736, Phone: (571)272-3668 , Office: P/2118 )
| Most Active Art Unit | 2116 |
| Art Unit(s) | 2118, 2121, 2116, 2115, 2185 |
| Total Applications | 1546 |
| Issued Applications | 1324 |
| Pending Applications | 89 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7693373
[patent_doc_number] => 20070016313
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-18
[patent_title] => 'Power supply controller'
[patent_app_type] => utility
[patent_app_number] => 11/261713
[patent_app_country] => US
[patent_app_date] => 2005-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7580
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0016/20070016313.pdf
[firstpage_image] =>[orig_patent_app_number] => 11261713
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/261713 | Power supply controller | Oct 30, 2005 | Abandoned |
Array
(
[id] => 5137523
[patent_doc_number] => 20070079152
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-05
[patent_title] => 'System and method for throttling memory power consumption'
[patent_app_type] => utility
[patent_app_number] => 11/242686
[patent_app_country] => US
[patent_app_date] => 2005-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3406
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0079/20070079152.pdf
[firstpage_image] =>[orig_patent_app_number] => 11242686
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/242686 | System and method for throttling memory power consumption based on status of cover switch of a computer system | Oct 2, 2005 | Issued |
Array
(
[id] => 5761784
[patent_doc_number] => 20060212729
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-21
[patent_title] => 'Information processing device, operating system switchover method and recording medium'
[patent_app_type] => utility
[patent_app_number] => 11/239067
[patent_app_country] => US
[patent_app_date] => 2005-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4282
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0212/20060212729.pdf
[firstpage_image] =>[orig_patent_app_number] => 11239067
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/239067 | Information processing device, operating system switchover method and recording medium | Sep 29, 2005 | Abandoned |
Array
(
[id] => 5137532
[patent_doc_number] => 20070079161
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-05
[patent_title] => 'Power-efficient technique for invoking a co-processor'
[patent_app_type] => utility
[patent_app_number] => 11/241032
[patent_app_country] => US
[patent_app_date] => 2005-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5521
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0079/20070079161.pdf
[firstpage_image] =>[orig_patent_app_number] => 11241032
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/241032 | Power-efficient technique for invoking a co-processor | Sep 29, 2005 | Issued |
Array
(
[id] => 5137519
[patent_doc_number] => 20070079148
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-05
[patent_title] => 'MCU with power saving mode'
[patent_app_type] => utility
[patent_app_number] => 11/240923
[patent_app_country] => US
[patent_app_date] => 2005-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7721
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0079/20070079148.pdf
[firstpage_image] =>[orig_patent_app_number] => 11240923
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/240923 | MCU with power saving mode | Sep 29, 2005 | Issued |
Array
(
[id] => 796888
[patent_doc_number] => 07430682
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-30
[patent_title] => 'Processing image data from multiple sources'
[patent_app_type] => utility
[patent_app_number] => 11/240420
[patent_app_country] => US
[patent_app_date] => 2005-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2941
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/430/07430682.pdf
[firstpage_image] =>[orig_patent_app_number] => 11240420
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/240420 | Processing image data from multiple sources | Sep 29, 2005 | Issued |
Array
(
[id] => 5638960
[patent_doc_number] => 20060069934
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-30
[patent_title] => 'Arrangement and method for controlling communication of data between processors'
[patent_app_type] => utility
[patent_app_number] => 11/240815
[patent_app_country] => US
[patent_app_date] => 2005-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4765
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0069/20060069934.pdf
[firstpage_image] =>[orig_patent_app_number] => 11240815
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/240815 | Arrangement and method for controlling communication of data between processors | Sep 29, 2005 | Issued |
Array
(
[id] => 5137521
[patent_doc_number] => 20070079150
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-05
[patent_title] => 'Dynamic core swapping'
[patent_app_type] => utility
[patent_app_number] => 11/241376
[patent_app_country] => US
[patent_app_date] => 2005-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5510
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0079/20070079150.pdf
[firstpage_image] =>[orig_patent_app_number] => 11241376
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/241376 | Dynamic core swapping | Sep 29, 2005 | Issued |
Array
(
[id] => 5173457
[patent_doc_number] => 20070073896
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-29
[patent_title] => 'System and method for power reduction'
[patent_app_type] => utility
[patent_app_number] => 11/241275
[patent_app_country] => US
[patent_app_date] => 2005-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4990
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0073/20070073896.pdf
[firstpage_image] =>[orig_patent_app_number] => 11241275
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/241275 | System and method for power reduction by sequestering at least one device or partition in a platform from operating system access | Sep 28, 2005 | Issued |
Array
(
[id] => 5761791
[patent_doc_number] => 20060212736
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-21
[patent_title] => 'Information processing apparatus, quick activation method, and record medium'
[patent_app_type] => utility
[patent_app_number] => 11/237822
[patent_app_country] => US
[patent_app_date] => 2005-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7166
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0212/20060212736.pdf
[firstpage_image] =>[orig_patent_app_number] => 11237822
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/237822 | Information processing apparatus, quick activation method, and storage medium | Sep 28, 2005 | Issued |
Array
(
[id] => 372022
[patent_doc_number] => 07478252
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-13
[patent_title] => 'Power off controllers and memory storage apparatus including a power-polling time control circuit'
[patent_app_type] => utility
[patent_app_number] => 11/237809
[patent_app_country] => US
[patent_app_date] => 2005-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 20
[patent_no_of_words] => 6319
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/478/07478252.pdf
[firstpage_image] =>[orig_patent_app_number] => 11237809
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/237809 | Power off controllers and memory storage apparatus including a power-polling time control circuit | Sep 27, 2005 | Issued |
Array
(
[id] => 813336
[patent_doc_number] => 07418615
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-26
[patent_title] => 'Universal timeout mechanism'
[patent_app_type] => utility
[patent_app_number] => 11/237448
[patent_app_country] => US
[patent_app_date] => 2005-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2839
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/418/07418615.pdf
[firstpage_image] =>[orig_patent_app_number] => 11237448
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/237448 | Universal timeout mechanism | Sep 26, 2005 | Issued |
Array
(
[id] => 5822136
[patent_doc_number] => 20060026449
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-02
[patent_title] => 'Robust and scalable de-skew method'
[patent_app_type] => utility
[patent_app_number] => 11/231773
[patent_app_country] => US
[patent_app_date] => 2005-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7977
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0026/20060026449.pdf
[firstpage_image] =>[orig_patent_app_number] => 11231773
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/231773 | Robust and scalable de-skew method | Sep 21, 2005 | Issued |
Array
(
[id] => 254480
[patent_doc_number] => 07581123
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-25
[patent_title] => 'Recording media drive provided with a connecting pin for supply of 3.3V'
[patent_app_type] => utility
[patent_app_number] => 11/228860
[patent_app_country] => US
[patent_app_date] => 2005-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8799
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/581/07581123.pdf
[firstpage_image] =>[orig_patent_app_number] => 11228860
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/228860 | Recording media drive provided with a connecting pin for supply of 3.3V | Sep 15, 2005 | Issued |
Array
(
[id] => 5143785
[patent_doc_number] => 20070006001
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-04
[patent_title] => 'Storage controller and storage system'
[patent_app_type] => utility
[patent_app_number] => 11/224110
[patent_app_country] => US
[patent_app_date] => 2005-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 8029
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0006/20070006001.pdf
[firstpage_image] =>[orig_patent_app_number] => 11224110
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/224110 | Storage controller and storage system | Sep 12, 2005 | Issued |
Array
(
[id] => 596705
[patent_doc_number] => 07454648
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-18
[patent_title] => 'System and method for calibrating a time of day clock in a computing system node provided in a multi-node network'
[patent_app_type] => utility
[patent_app_number] => 11/223642
[patent_app_country] => US
[patent_app_date] => 2005-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6524
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/454/07454648.pdf
[firstpage_image] =>[orig_patent_app_number] => 11223642
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/223642 | System and method for calibrating a time of day clock in a computing system node provided in a multi-node network | Sep 8, 2005 | Issued |
Array
(
[id] => 571581
[patent_doc_number] => 07469348
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-23
[patent_title] => 'Method for dynamic insertion loss control for 10/100/1000 MHz Ethernet signaling'
[patent_app_type] => utility
[patent_app_number] => 11/207602
[patent_app_country] => US
[patent_app_date] => 2005-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 8987
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/469/07469348.pdf
[firstpage_image] =>[orig_patent_app_number] => 11207602
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/207602 | Method for dynamic insertion loss control for 10/100/1000 MHz Ethernet signaling | Aug 18, 2005 | Issued |
Array
(
[id] => 799052
[patent_doc_number] => 07428646
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-23
[patent_title] => 'Wireless control system and method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/167103
[patent_app_country] => US
[patent_app_date] => 2005-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2781
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/428/07428646.pdf
[firstpage_image] =>[orig_patent_app_number] => 11167103
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/167103 | Wireless control system and method thereof | Jun 27, 2005 | Issued |
Array
(
[id] => 6968299
[patent_doc_number] => 20050235172
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-20
[patent_title] => 'Micro-controller having USB control unit, MC unit and oscillating circuit commonly used by the USB control unit and the MC unit'
[patent_app_type] => utility
[patent_app_number] => 11/154718
[patent_app_country] => US
[patent_app_date] => 2005-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 12995
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20050235172.pdf
[firstpage_image] =>[orig_patent_app_number] => 11154718
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/154718 | Micro-controller having USB control unit, MC unit and oscillating circuit commonly used by the USB control unit and the MC unit | Jun 16, 2005 | Issued |
Array
(
[id] => 6979653
[patent_doc_number] => 20050289371
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-29
[patent_title] => 'Power management apparatus, and power management method and computer program product therefor'
[patent_app_type] => utility
[patent_app_number] => 11/153314
[patent_app_country] => US
[patent_app_date] => 2005-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5641
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0289/20050289371.pdf
[firstpage_image] =>[orig_patent_app_number] => 11153314
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/153314 | Power management apparatus and method for managing the quantity of power that is consumed by a computer group including a plurality of computers interconnected by a network | Jun 15, 2005 | Issued |