Search

Suresh Suryawanshi

Examiner (ID: 4736, Phone: (571)272-3668 , Office: P/2118 )

Most Active Art Unit
2116
Art Unit(s)
2118, 2121, 2116, 2115, 2185
Total Applications
1546
Issued Applications
1324
Pending Applications
89
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5774067 [patent_doc_number] => 20050268081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-01 [patent_title] => 'Booting system and/or method for initializing peripherals' [patent_app_type] => utility [patent_app_number] => 11/100632 [patent_app_country] => US [patent_app_date] => 2005-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2738 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20050268081.pdf [firstpage_image] =>[orig_patent_app_number] => 11100632 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/100632
Booting system and/or method for initializing peripherals Apr 6, 2005 Issued
Array ( [id] => 868816 [patent_doc_number] => 07370190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Data processing systems and methods with enhanced bios functionality' [patent_app_type] => utility [patent_app_number] => 11/101188 [patent_app_country] => US [patent_app_date] => 2005-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10431 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/370/07370190.pdf [firstpage_image] =>[orig_patent_app_number] => 11101188 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/101188
Data processing systems and methods with enhanced bios functionality Apr 5, 2005 Issued
Array ( [id] => 5856984 [patent_doc_number] => 20060227914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Clock data recovery circuit with circuit loop disablement' [patent_app_type] => utility [patent_app_number] => 11/093554 [patent_app_country] => US [patent_app_date] => 2005-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 16286 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20060227914.pdf [firstpage_image] =>[orig_patent_app_number] => 11093554 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/093554
Clock data recovery circuit with circuit loop disablement Mar 29, 2005 Issued
Array ( [id] => 4815245 [patent_doc_number] => 20080195876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'System and Method for Reducing Power Consumption' [patent_app_type] => utility [patent_app_number] => 11/910069 [patent_app_country] => US [patent_app_date] => 2005-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5427 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20080195876.pdf [firstpage_image] =>[orig_patent_app_number] => 11910069 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/910069
System and method for reducing power consumption of a transistor-based circuit having multiple operational modes characterized by different power consumption level Mar 29, 2005 Issued
Array ( [id] => 598222 [patent_doc_number] => 07451301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'OS independent device management methods and apparatuses having a map providing codes for various activations of keys' [patent_app_type] => utility [patent_app_number] => 11/095151 [patent_app_country] => US [patent_app_date] => 2005-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2351 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/451/07451301.pdf [firstpage_image] =>[orig_patent_app_number] => 11095151 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/095151
OS independent device management methods and apparatuses having a map providing codes for various activations of keys Mar 29, 2005 Issued
Array ( [id] => 7217896 [patent_doc_number] => 20050253828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'Computer system and method of controlling the same' [patent_app_type] => utility [patent_app_number] => 11/082790 [patent_app_country] => US [patent_app_date] => 2005-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3584 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20050253828.pdf [firstpage_image] =>[orig_patent_app_number] => 11082790 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/082790
Computer system and method of controlling the same Mar 17, 2005 Abandoned
Array ( [id] => 5755193 [patent_doc_number] => 20060224342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'System and method for reducing jitter of signals coupled through adjacent signal lines' [patent_app_type] => utility [patent_app_number] => 11/080236 [patent_app_country] => US [patent_app_date] => 2005-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3435 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20060224342.pdf [firstpage_image] =>[orig_patent_app_number] => 11080236 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/080236
System and method for reducing jitter of signals coupled through adjacent signal lines Mar 13, 2005 Issued
Array ( [id] => 5927924 [patent_doc_number] => 20060242395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'Operating system boot from network location' [patent_app_type] => utility [patent_app_number] => 11/074875 [patent_app_country] => US [patent_app_date] => 2005-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3205 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20060242395.pdf [firstpage_image] =>[orig_patent_app_number] => 11074875 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/074875
Operating system boot from network location Mar 8, 2005 Abandoned
Array ( [id] => 5788945 [patent_doc_number] => 20060206702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Operating system boot from external media' [patent_app_type] => utility [patent_app_number] => 11/074876 [patent_app_country] => US [patent_app_date] => 2005-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4891 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20060206702.pdf [firstpage_image] =>[orig_patent_app_number] => 11074876 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/074876
Method and system for performing pre-boot operations from an external memory including memory address and geometry Mar 8, 2005 Issued
Array ( [id] => 894692 [patent_doc_number] => 07350088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-25 [patent_title] => 'Power management system for UPS attached to external devices' [patent_app_type] => utility [patent_app_number] => 11/075409 [patent_app_country] => US [patent_app_date] => 2005-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7275 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/350/07350088.pdf [firstpage_image] =>[orig_patent_app_number] => 11075409 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/075409
Power management system for UPS attached to external devices Mar 7, 2005 Issued
Array ( [id] => 5789043 [patent_doc_number] => 20060206744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Low-power high-throughput streaming computations' [patent_app_type] => utility [patent_app_number] => 11/075277 [patent_app_country] => US [patent_app_date] => 2005-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9992 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20060206744.pdf [firstpage_image] =>[orig_patent_app_number] => 11075277 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/075277
Low-power high-throughput streaming computations Mar 7, 2005 Abandoned
Array ( [id] => 5789016 [patent_doc_number] => 20060206730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Methods and systems for allocating power to an electronic device' [patent_app_type] => utility [patent_app_number] => 11/074424 [patent_app_country] => US [patent_app_date] => 2005-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3915 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20060206730.pdf [firstpage_image] =>[orig_patent_app_number] => 11074424 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/074424
Methods and systems for allocating power to an electronic device Mar 7, 2005 Issued
Array ( [id] => 894705 [patent_doc_number] => 07350092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-25 [patent_title] => 'Data synchronization arrangement' [patent_app_type] => utility [patent_app_number] => 11/074443 [patent_app_country] => US [patent_app_date] => 2005-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2270 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/350/07350092.pdf [firstpage_image] =>[orig_patent_app_number] => 11074443 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/074443
Data synchronization arrangement Mar 7, 2005 Issued
Array ( [id] => 7021599 [patent_doc_number] => 20050223208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Transient transceiver clock configuration' [patent_app_type] => utility [patent_app_number] => 11/074606 [patent_app_country] => US [patent_app_date] => 2005-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8357 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20050223208.pdf [firstpage_image] =>[orig_patent_app_number] => 11074606 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/074606
Transient transceiver clock configuration Mar 6, 2005 Issued
Array ( [id] => 5773927 [patent_doc_number] => 20050268010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-01 [patent_title] => 'Electronic device with serial ATA interface and power-saving control method used in the device' [patent_app_type] => utility [patent_app_number] => 11/074492 [patent_app_country] => US [patent_app_date] => 2005-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20050268010.pdf [firstpage_image] =>[orig_patent_app_number] => 11074492 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/074492
Electronic device with serial ATA interface and power-saving control method used in the device Mar 6, 2005 Issued
Array ( [id] => 5867167 [patent_doc_number] => 20060101298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Wake-up system using oscillation' [patent_app_type] => utility [patent_app_number] => 11/073819 [patent_app_country] => US [patent_app_date] => 2005-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4729 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20060101298.pdf [firstpage_image] =>[orig_patent_app_number] => 11073819 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/073819
Wake-up system using oscillation Mar 6, 2005 Abandoned
Array ( [id] => 5684424 [patent_doc_number] => 20060200694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Controlling sequence of clock distribution to clock distribution domains' [patent_app_type] => utility [patent_app_number] => 11/073294 [patent_app_country] => US [patent_app_date] => 2005-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3166 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20060200694.pdf [firstpage_image] =>[orig_patent_app_number] => 11073294 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/073294
Controlling sequence of clock distribution to clock distribution domains Mar 3, 2005 Issued
Array ( [id] => 355534 [patent_doc_number] => 07493484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-17 [patent_title] => 'Method and apparatus for executing the boot code of embedded systems' [patent_app_type] => utility [patent_app_number] => 11/050477 [patent_app_country] => US [patent_app_date] => 2005-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3701 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/493/07493484.pdf [firstpage_image] =>[orig_patent_app_number] => 11050477 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/050477
Method and apparatus for executing the boot code of embedded systems Feb 2, 2005 Issued
Array ( [id] => 5879202 [patent_doc_number] => 20060168465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Synchronizing registers' [patent_app_type] => utility [patent_app_number] => 11/040756 [patent_app_country] => US [patent_app_date] => 2005-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4190 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20060168465.pdf [firstpage_image] =>[orig_patent_app_number] => 11040756 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/040756
Method and system for updating a value of a slow register to a value of a fast register Jan 20, 2005 Issued
Array ( [id] => 586922 [patent_doc_number] => 07467319 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-16 [patent_title] => 'Ethernet media access controller embedded in a programmable logic device—clock interface' [patent_app_type] => utility [patent_app_number] => 11/041125 [patent_app_country] => US [patent_app_date] => 2005-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 68 [patent_figures_cnt] => 81 [patent_no_of_words] => 40548 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/467/07467319.pdf [firstpage_image] =>[orig_patent_app_number] => 11041125 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/041125
Ethernet media access controller embedded in a programmable logic device—clock interface Jan 20, 2005 Issued
Menu