
Suresh Suryawanshi
Examiner (ID: 4736, Phone: (571)272-3668 , Office: P/2118 )
| Most Active Art Unit | 2116 |
| Art Unit(s) | 2118, 2121, 2116, 2115, 2185 |
| Total Applications | 1546 |
| Issued Applications | 1324 |
| Pending Applications | 89 |
| Abandoned Applications | 163 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5774067
[patent_doc_number] => 20050268081
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-01
[patent_title] => 'Booting system and/or method for initializing peripherals'
[patent_app_type] => utility
[patent_app_number] => 11/100632
[patent_app_country] => US
[patent_app_date] => 2005-04-07
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/100632 | Booting system and/or method for initializing peripherals | Apr 6, 2005 | Issued |
Array
(
[id] => 868816
[patent_doc_number] => 07370190
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[patent_kind] => B2
[patent_issue_date] => 2008-05-06
[patent_title] => 'Data processing systems and methods with enhanced bios functionality'
[patent_app_type] => utility
[patent_app_number] => 11/101188
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[patent_app_date] => 2005-04-06
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/101188 | Data processing systems and methods with enhanced bios functionality | Apr 5, 2005 | Issued |
Array
(
[id] => 5856984
[patent_doc_number] => 20060227914
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[patent_kind] => A1
[patent_issue_date] => 2006-10-12
[patent_title] => 'Clock data recovery circuit with circuit loop disablement'
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[patent_app_number] => 11/093554
[patent_app_country] => US
[patent_app_date] => 2005-03-30
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/093554 | Clock data recovery circuit with circuit loop disablement | Mar 29, 2005 | Issued |
Array
(
[id] => 4815245
[patent_doc_number] => 20080195876
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[patent_kind] => A1
[patent_issue_date] => 2008-08-14
[patent_title] => 'System and Method for Reducing Power Consumption'
[patent_app_type] => utility
[patent_app_number] => 11/910069
[patent_app_country] => US
[patent_app_date] => 2005-03-30
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[firstpage_image] =>[orig_patent_app_number] => 11910069
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/910069 | System and method for reducing power consumption of a transistor-based circuit having multiple operational modes characterized by different power consumption level | Mar 29, 2005 | Issued |
Array
(
[id] => 598222
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[patent_issue_date] => 2008-11-11
[patent_title] => 'OS independent device management methods and apparatuses having a map providing codes for various activations of keys'
[patent_app_type] => utility
[patent_app_number] => 11/095151
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/095151 | OS independent device management methods and apparatuses having a map providing codes for various activations of keys | Mar 29, 2005 | Issued |
Array
(
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[patent_issue_date] => 2005-11-17
[patent_title] => 'Computer system and method of controlling the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/082790 | Computer system and method of controlling the same | Mar 17, 2005 | Abandoned |
Array
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[patent_title] => 'System and method for reducing jitter of signals coupled through adjacent signal lines'
[patent_app_type] => utility
[patent_app_number] => 11/080236
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/080236 | System and method for reducing jitter of signals coupled through adjacent signal lines | Mar 13, 2005 | Issued |
Array
(
[id] => 5927924
[patent_doc_number] => 20060242395
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[patent_issue_date] => 2006-10-26
[patent_title] => 'Operating system boot from network location'
[patent_app_type] => utility
[patent_app_number] => 11/074875
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/074875 | Operating system boot from network location | Mar 8, 2005 | Abandoned |
Array
(
[id] => 5788945
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/074876 | Method and system for performing pre-boot operations from an external memory including memory address and geometry | Mar 8, 2005 | Issued |
Array
(
[id] => 894692
[patent_doc_number] => 07350088
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[patent_issue_date] => 2008-03-25
[patent_title] => 'Power management system for UPS attached to external devices'
[patent_app_type] => utility
[patent_app_number] => 11/075409
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/075409 | Power management system for UPS attached to external devices | Mar 7, 2005 | Issued |
Array
(
[id] => 5789043
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[patent_title] => 'Low-power high-throughput streaming computations'
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Array
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Array
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Array
(
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Array
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Array
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Array
(
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Array
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