Search

Susan Beth Mccormick Ewoldt

Examiner (ID: 13476, Phone: (571)272-0981 , Office: P/1661 )

Most Active Art Unit
1661
Art Unit(s)
1661, 1654, 1655, 1649
Total Applications
4273
Issued Applications
3965
Pending Applications
37
Abandoned Applications
283

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17310301 [patent_doc_number] => 11211428 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Integrated circuit including transistors having a common base [patent_app_type] => utility [patent_app_number] => 16/375557 [patent_app_country] => US [patent_app_date] => 2019-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3462 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16375557 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/375557
Integrated circuit including transistors having a common base Apr 3, 2019 Issued
Array ( [id] => 17166317 [patent_doc_number] => 11152430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Integrated circuit including bipolar transistors [patent_app_type] => utility [patent_app_number] => 16/375571 [patent_app_country] => US [patent_app_date] => 2019-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3881 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16375571 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/375571
Integrated circuit including bipolar transistors Apr 3, 2019 Issued
Array ( [id] => 14631617 [patent_doc_number] => 20190229179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => ORGANIC LIGHT EMITTING DIODE DISPLAY AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/372246 [patent_app_country] => US [patent_app_date] => 2019-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6944 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16372246 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/372246
Organic light emitting diode display and manufacturing method thereof Mar 31, 2019 Issued
Array ( [id] => 16707843 [patent_doc_number] => 10957787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Sensors based on a heterojunction bipolar transistor construction [patent_app_type] => utility [patent_app_number] => 16/299860 [patent_app_country] => US [patent_app_date] => 2019-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 5644 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16299860 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/299860
Sensors based on a heterojunction bipolar transistor construction Mar 11, 2019 Issued
Array ( [id] => 16739134 [patent_doc_number] => 10964802 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => Semiconductor device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/298172 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5580 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16298172 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/298172
Semiconductor device and method for manufacturing the same Mar 10, 2019 Issued
Array ( [id] => 15274785 [patent_doc_number] => 20190386127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/297776 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6292 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16297776 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/297776
Semiconductor device and method for manufacturing the same Mar 10, 2019 Issued
Array ( [id] => 16928468 [patent_doc_number] => 11049960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-29 [patent_title] => Gallium nitride (GaN) based transistor with multiple p-GaN blocks [patent_app_type] => utility [patent_app_number] => 16/294687 [patent_app_country] => US [patent_app_date] => 2019-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 7252 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16294687 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/294687
Gallium nitride (GaN) based transistor with multiple p-GaN blocks Mar 5, 2019 Issued
Array ( [id] => 17152688 [patent_doc_number] => 11145779 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Germanium photodiode [patent_app_type] => utility [patent_app_number] => 16/294645 [patent_app_country] => US [patent_app_date] => 2019-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 3356 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16294645 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/294645
Germanium photodiode Mar 5, 2019 Issued
Array ( [id] => 14573593 [patent_doc_number] => 20190214404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/257357 [patent_app_country] => US [patent_app_date] => 2019-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13813 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16257357 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/257357
Three-dimensional semiconductor device Jan 24, 2019 Issued
Array ( [id] => 16210482 [patent_doc_number] => 20200243472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => CODE PATTERN FOR REPRESENTING TRACING NUMBER OF CHIP [patent_app_type] => utility [patent_app_number] => 16/257136 [patent_app_country] => US [patent_app_date] => 2019-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2747 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16257136 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/257136
Code pattern for representing tracing number of chip Jan 24, 2019 Issued
Array ( [id] => 16210566 [patent_doc_number] => 20200243556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => THREE-DIMENSIONAL STACKED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/257176 [patent_app_country] => US [patent_app_date] => 2019-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16257176 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/257176
THREE-DIMENSIONAL STACKED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Jan 24, 2019 Abandoned
Array ( [id] => 17529872 [patent_doc_number] => 11302570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Interconnect structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/257809 [patent_app_country] => US [patent_app_date] => 2019-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 43 [patent_no_of_words] => 7862 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16257809 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/257809
Interconnect structure and method for forming the same Jan 24, 2019 Issued
Array ( [id] => 17239619 [patent_doc_number] => 11183511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-23 [patent_title] => Memory device and manufacturing method for the same [patent_app_type] => utility [patent_app_number] => 16/257165 [patent_app_country] => US [patent_app_date] => 2019-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 32 [patent_no_of_words] => 4706 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16257165 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/257165
Memory device and manufacturing method for the same Jan 24, 2019 Issued
Array ( [id] => 15369697 [patent_doc_number] => 20200020613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/256895 [patent_app_country] => US [patent_app_date] => 2019-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16256895 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/256895
Semiconductor package Jan 23, 2019 Issued
Array ( [id] => 14694767 [patent_doc_number] => 20190246499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => Vertical-Side Solder Method and Package for Power GaN Devices [patent_app_type] => utility [patent_app_number] => 16/254296 [patent_app_country] => US [patent_app_date] => 2019-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3998 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16254296 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/254296
Vertical-side solder method and package for power GaN devices Jan 21, 2019 Issued
Array ( [id] => 15921527 [patent_doc_number] => 10658010 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Apparatus for high speed ROM cells [patent_app_type] => utility [patent_app_number] => 16/229072 [patent_app_country] => US [patent_app_date] => 2018-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 10755 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16229072 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/229072
Apparatus for high speed ROM cells Dec 20, 2018 Issued
Array ( [id] => 15045835 [patent_doc_number] => 20190333922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/152605 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12828 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16152605 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/152605
Three-dimensional semiconductor memory devices Oct 4, 2018 Issued
Array ( [id] => 15532969 [patent_doc_number] => 20200058790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => METHODS OF FABRICATING SEMICONDUCTOR DEVICES HAVING GATE STRUCTURE WITH BENT SIDEWALLS [patent_app_type] => utility [patent_app_number] => 16/152877 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11548 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16152877 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/152877
Methods of fabricating semiconductor devices having gate structure with bent sidewalls Oct 4, 2018 Issued
Array ( [id] => 16464160 [patent_doc_number] => 10847521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Layout pattern of a static random access memory [patent_app_type] => utility [patent_app_number] => 16/152423 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4621 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16152423 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/152423
Layout pattern of a static random access memory Oct 4, 2018 Issued
Array ( [id] => 16264649 [patent_doc_number] => 10756096 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Integrated circuit structure with complementary field effect transistor and buried metal interconnect and method [patent_app_type] => utility [patent_app_number] => 16/152454 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 57 [patent_no_of_words] => 13846 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16152454 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/152454
Integrated circuit structure with complementary field effect transistor and buried metal interconnect and method Oct 4, 2018 Issued
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