Search

Susan Dadio

Examiner (ID: 11306)

Most Active Art Unit
1808
Art Unit(s)
1808, 1651
Total Applications
189
Issued Applications
98
Pending Applications
19
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4266929 [patent_doc_number] => 06306721 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Method of forming salicided poly to metal capacitor' [patent_app_type] => 1 [patent_app_number] => 9/808926 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4798 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/306/06306721.pdf [firstpage_image] =>[orig_patent_app_number] => 808926 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/808926
Method of forming salicided poly to metal capacitor Mar 15, 2001 Issued
Array ( [id] => 1458693 [patent_doc_number] => 06426243 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Methods of forming dynamic random access memory circuitry' [patent_app_type] => B1 [patent_app_number] => 09/810586 [patent_app_country] => US [patent_app_date] => 2001-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 2688 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/426/06426243.pdf [firstpage_image] =>[orig_patent_app_number] => 09810586 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/810586
Methods of forming dynamic random access memory circuitry Mar 14, 2001 Issued
Array ( [id] => 1514476 [patent_doc_number] => 06420225 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Method of fabricating power rectifier device' [patent_app_type] => B1 [patent_app_number] => 09/805815 [patent_app_country] => US [patent_app_date] => 2001-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 2641 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/420/06420225.pdf [firstpage_image] =>[orig_patent_app_number] => 09805815 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/805815
Method of fabricating power rectifier device Mar 12, 2001 Issued
Array ( [id] => 6947930 [patent_doc_number] => 20010021564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-13 [patent_title] => 'Method for fabricating dielectric capacitor' [patent_app_type] => new [patent_app_number] => 09/800877 [patent_app_country] => US [patent_app_date] => 2001-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6950 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20010021564.pdf [firstpage_image] =>[orig_patent_app_number] => 09800877 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/800877
Method for fabricating dielectric capacitor Mar 6, 2001 Abandoned
Array ( [id] => 1559960 [patent_doc_number] => 06436853 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Microstructures' [patent_app_type] => B1 [patent_app_number] => 09/794455 [patent_app_country] => US [patent_app_date] => 2001-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 27 [patent_no_of_words] => 8048 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/436/06436853.pdf [firstpage_image] =>[orig_patent_app_number] => 09794455 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/794455
Microstructures Feb 26, 2001 Issued
Array ( [id] => 6896194 [patent_doc_number] => 20010026984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'Insulated gate bipolar transistor having high breakdown voltage in reverse blocking mode, and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 09/790816 [patent_app_country] => US [patent_app_date] => 2001-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20010026984.pdf [firstpage_image] =>[orig_patent_app_number] => 09790816 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/790816
Insulated gate bipolar transistor having high breakdown voltage in reverse blocking mode Feb 22, 2001 Issued
Array ( [id] => 6894028 [patent_doc_number] => 20010016394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Manufacturing method of semiconductor device having tantalum oxide film' [patent_app_type] => new [patent_app_number] => 09/789825 [patent_app_country] => US [patent_app_date] => 2001-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5904 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20010016394.pdf [firstpage_image] =>[orig_patent_app_number] => 09789825 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/789825
Manufacturing method of semiconductor device having tantalum oxide film Feb 21, 2001 Abandoned
Array ( [id] => 7040026 [patent_doc_number] => 20010005034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-28 [patent_title] => 'Inductor with magnetic material layers' [patent_app_type] => new-utility [patent_app_number] => 09/789146 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2077 [patent_no_of_claims] => 120 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20010005034.pdf [firstpage_image] =>[orig_patent_app_number] => 09789146 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/789146
Inductor with magnetic material layers Feb 19, 2001 Issued
Array ( [id] => 6123548 [patent_doc_number] => 20020074638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'MULTI-CHIP SEMICONDUCTOR PACKAGE STRUCTURE' [patent_app_type] => new [patent_app_number] => 09/788703 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6089 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20020074638.pdf [firstpage_image] =>[orig_patent_app_number] => 09788703 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/788703
Multi-chip semiconductor package structure Feb 19, 2001 Issued
Array ( [id] => 6522247 [patent_doc_number] => 20020109174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Pull-down transistor' [patent_app_type] => new [patent_app_number] => 09/783846 [patent_app_country] => US [patent_app_date] => 2001-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1994 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20020109174.pdf [firstpage_image] =>[orig_patent_app_number] => 09783846 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/783846
Pull-down transistor Feb 14, 2001 Abandoned
Array ( [id] => 6277127 [patent_doc_number] => 20020106857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'Method for surface area enhancement of capacitors by film growth and self masking' [patent_app_type] => new [patent_app_number] => 09/777445 [patent_app_country] => US [patent_app_date] => 2001-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3199 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20020106857.pdf [firstpage_image] =>[orig_patent_app_number] => 09777445 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/777445
Method for surface area enhancement of capacitors by film growth and self masking Feb 5, 2001 Abandoned
Array ( [id] => 1446596 [patent_doc_number] => 06368935 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Method for upgrading quality of DRAM capacitor and wafer-to-wafer uniformity' [patent_app_type] => B1 [patent_app_number] => 09/774455 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1948 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/368/06368935.pdf [firstpage_image] =>[orig_patent_app_number] => 09774455 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/774455
Method for upgrading quality of DRAM capacitor and wafer-to-wafer uniformity Jan 30, 2001 Issued
Array ( [id] => 1478145 [patent_doc_number] => 06451680 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Method for reducing borderless contact leakage by OPC' [patent_app_type] => B1 [patent_app_number] => 09/774456 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1364 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/451/06451680.pdf [firstpage_image] =>[orig_patent_app_number] => 09774456 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/774456
Method for reducing borderless contact leakage by OPC Jan 30, 2001 Issued
Array ( [id] => 6886605 [patent_doc_number] => 20010019874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-06 [patent_title] => 'Capacitor for integrated circuit and its fabrication method' [patent_app_type] => new [patent_app_number] => 09/768170 [patent_app_country] => US [patent_app_date] => 2001-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3606 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20010019874.pdf [firstpage_image] =>[orig_patent_app_number] => 09768170 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/768170
Fabrication method of capacitor for integrated circuit Jan 23, 2001 Issued
Array ( [id] => 7078558 [patent_doc_number] => 20010041415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-15 [patent_title] => 'METHODS OF FORMING CAPACITORS' [patent_app_type] => new [patent_app_number] => 09/765510 [patent_app_country] => US [patent_app_date] => 2001-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4654 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20010041415.pdf [firstpage_image] =>[orig_patent_app_number] => 09765510 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/765510
Methods of forming capacitors Jan 18, 2001 Issued
Array ( [id] => 1545151 [patent_doc_number] => 06444515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-09-03 [patent_title] => 'Method of fabricating a semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/761176 [patent_app_country] => US [patent_app_date] => 2001-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 28 [patent_no_of_words] => 7939 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/444/06444515.pdf [firstpage_image] =>[orig_patent_app_number] => 09761176 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/761176
Method of fabricating a semiconductor device Jan 17, 2001 Issued
Array ( [id] => 1410328 [patent_doc_number] => 06528431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-04 [patent_title] => 'Method for fabricating semiconductor integrated circuit drive using an oxygen and hydrogen catalyst' [patent_app_type] => B2 [patent_app_number] => 09/752766 [patent_app_country] => US [patent_app_date] => 2001-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 34 [patent_no_of_words] => 18361 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/528/06528431.pdf [firstpage_image] =>[orig_patent_app_number] => 09752766 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/752766
Method for fabricating semiconductor integrated circuit drive using an oxygen and hydrogen catalyst Jan 2, 2001 Issued
Array ( [id] => 6986876 [patent_doc_number] => 20010036708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-01 [patent_title] => 'Method for forming a capacitor for semiconductor devices' [patent_app_type] => new [patent_app_number] => 09/751396 [patent_app_country] => US [patent_app_date] => 2001-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3010 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20010036708.pdf [firstpage_image] =>[orig_patent_app_number] => 09751396 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751396
Method for forming a capacitor for semiconductor devices with diffusion barrier layer on both sides of dielectric layer Jan 1, 2001 Issued
Array ( [id] => 6876673 [patent_doc_number] => 20010006826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-05 [patent_title] => 'Method for forming a capacitor for semiconductor devices' [patent_app_type] => new-utility [patent_app_number] => 09/750035 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2985 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20010006826.pdf [firstpage_image] =>[orig_patent_app_number] => 09750035 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/750035
Method for forming a capacitor for semiconductor devices with an amorphous LixTa1-xO3 dieletric layer having a perovskite structure Dec 28, 2000 Issued
Array ( [id] => 6081111 [patent_doc_number] => 20020081804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'Phase-change memory cell using silicon on insulator' [patent_app_type] => new [patent_app_number] => 09/751485 [patent_app_country] => US [patent_app_date] => 2000-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5703 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20020081804.pdf [firstpage_image] =>[orig_patent_app_number] => 09751485 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751485
Method of forming a phase-change memory cell using silicon on insulator low electrode in charcogenide elements Dec 26, 2000 Issued
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