Search

Susan M. Lee

Examiner (ID: 10541, Phone: (571)272-6027 , Office: P/2918 )

Most Active Art Unit
2918
Art Unit(s)
2918, 2911, 2917, 2943
Total Applications
3896
Issued Applications
3862
Pending Applications
4
Abandoned Applications
41

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20101300 [patent_doc_number] => 20250231236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => COMPONENT DIE VALIDATION BUILT-IN SELF-TEST (VBIST) ENGINE [patent_app_type] => utility [patent_app_number] => 19/097656 [patent_app_country] => US [patent_app_date] => 2025-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19097656 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/097656
COMPONENT DIE VALIDATION BUILT-IN SELF-TEST (VBIST) ENGINE Mar 31, 2025 Pending
Array ( [id] => 20325441 [patent_doc_number] => 20250337529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => Extended Long Range Packet Design and Use [patent_app_type] => utility [patent_app_number] => 19/070059 [patent_app_country] => US [patent_app_date] => 2025-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10610 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19070059 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/070059
Extended Long Range Packet Design and Use Mar 3, 2025 Pending
Array ( [id] => 20052084 [patent_doc_number] => 20250190306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 19/061051 [patent_app_country] => US [patent_app_date] => 2025-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19061051 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/061051
SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF Feb 23, 2025 Pending
Array ( [id] => 20054696 [patent_doc_number] => 20250192918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => ENCODING METHOD, DECODING METHOD, AND APPARATUS [patent_app_type] => utility [patent_app_number] => 19/055867 [patent_app_country] => US [patent_app_date] => 2025-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19055867 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/055867
ENCODING METHOD, DECODING METHOD, AND APPARATUS Feb 17, 2025 Pending
Array ( [id] => 20181194 [patent_doc_number] => 20250265152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => SEMICONDUCTOR CHIP OF CORRECTING ALIGNED ERROR AND SEMICONDUCTOR SYSTEM OF CORRECTING ALIGNED ERROR [patent_app_type] => utility [patent_app_number] => 19/049202 [patent_app_country] => US [patent_app_date] => 2025-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19049202 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/049202
SEMICONDUCTOR CHIP OF CORRECTING ALIGNED ERROR AND SEMICONDUCTOR SYSTEM OF CORRECTING ALIGNED ERROR Feb 9, 2025 Pending
Array ( [id] => 20045695 [patent_doc_number] => 20250183917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => DATA RELIABILITY FOR EXTREME TEMPERATURE USAGE CONDITIONS IN DATA STORAGE [patent_app_type] => utility [patent_app_number] => 19/047393 [patent_app_country] => US [patent_app_date] => 2025-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19047393 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/047393
DATA RELIABILITY FOR EXTREME TEMPERATURE USAGE CONDITIONS IN DATA STORAGE Feb 5, 2025 Pending
Array ( [id] => 20489029 [patent_doc_number] => 20260025232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => ELECTRONIC DEVICE FOR TRANSMITTING DATA AND CORRECTING ERROR IN RECEIVED DATA [patent_app_type] => utility [patent_app_number] => 19/045213 [patent_app_country] => US [patent_app_date] => 2025-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5808 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19045213 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/045213
ELECTRONIC DEVICE FOR TRANSMITTING DATA AND CORRECTING ERROR IN RECEIVED DATA Feb 3, 2025 Pending
Array ( [id] => 20045819 [patent_doc_number] => 20250184041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => DATA TRANSMISSION METHOD AND COMMUNICATION APPARATUS [patent_app_type] => utility [patent_app_number] => 19/042535 [patent_app_country] => US [patent_app_date] => 2025-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12929 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19042535 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/042535
DATA TRANSMISSION METHOD AND COMMUNICATION APPARATUS Jan 30, 2025 Pending
Array ( [id] => 20029697 [patent_doc_number] => 20250167919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => DATA PROCESSING METHOD, APPARATUS, AND DEVICE [patent_app_type] => utility [patent_app_number] => 19/024061 [patent_app_country] => US [patent_app_date] => 2025-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19024061 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/024061
DATA PROCESSING METHOD, APPARATUS, AND DEVICE Jan 15, 2025 Pending
Array ( [id] => 20000722 [patent_doc_number] => 20250138944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => BLOCK FAILURE PROTECTION FOR ZONE MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 19/010795 [patent_app_country] => US [patent_app_date] => 2025-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5142 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19010795 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/010795
BLOCK FAILURE PROTECTION FOR ZONE MEMORY SYSTEM Jan 5, 2025 Pending
Array ( [id] => 20003374 [patent_doc_number] => 20250141596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => TECHNIQUES FOR GENERATING AND USING LONGER LOW-DENSITY PARITY CHECK CODEWORDS [patent_app_type] => utility [patent_app_number] => 19/010527 [patent_app_country] => US [patent_app_date] => 2025-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19010527 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/010527
TECHNIQUES FOR GENERATING AND USING LONGER LOW-DENSITY PARITY CHECK CODEWORDS Jan 5, 2025 Pending
Array ( [id] => 20000522 [patent_doc_number] => 20250138744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => TEST MODE STATE MACHINE FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 19/004138 [patent_app_country] => US [patent_app_date] => 2024-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19004138 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/004138
TEST MODE STATE MACHINE FOR A MEMORY DEVICE Dec 26, 2024 Pending
Array ( [id] => 19987685 [patent_doc_number] => 20250125907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => LDPC Encoding Method, LDPC Decoding Method, and Related Apparatus [patent_app_type] => utility [patent_app_number] => 18/985795 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985795 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985795
LDPC Encoding Method, LDPC Decoding Method, and Related Apparatus Dec 17, 2024 Pending
Array ( [id] => 19987597 [patent_doc_number] => 20250125819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => ENERGY-EFFICIENT DATAPATH FOR VECTOR-SCALED HIERARCHICAL CODEBOOK QUANTIZATION [patent_app_type] => utility [patent_app_number] => 18/985581 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985581 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985581
ENERGY-EFFICIENT DATAPATH FOR VECTOR-SCALED HIERARCHICAL CODEBOOK QUANTIZATION Dec 17, 2024 Pending
Array ( [id] => 20782983 [patent_doc_number] => 20260171182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-06-18 [patent_title] => Reprogrammable Memory Repair [patent_app_type] => utility [patent_app_number] => 18/985856 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3338 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985856 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985856
Reprogrammable Memory Repair Dec 17, 2024 Pending
Array ( [id] => 19891979 [patent_doc_number] => 20250117291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => TARGETED COMMAND/ADDRESS PARITY LOW LIFT [patent_app_type] => utility [patent_app_number] => 18/983124 [patent_app_country] => US [patent_app_date] => 2024-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12616 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18983124 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/983124
TARGETED COMMAND/ADDRESS PARITY LOW LIFT Dec 15, 2024 Pending
Array ( [id] => 20054584 [patent_doc_number] => 20250192806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => EXTENDING LOW-DENSITY PARITY CHECK (LDPC) CODES FOR WI-FI [patent_app_type] => utility [patent_app_number] => 18/979311 [patent_app_country] => US [patent_app_date] => 2024-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18979311 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/979311
EXTENDING LOW-DENSITY PARITY CHECK (LDPC) CODES FOR WI-FI Dec 11, 2024 Pending
Array ( [id] => 19880388 [patent_doc_number] => 20250112645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => ETHERNET CODING METHOD AND APPARATUS [patent_app_type] => utility [patent_app_number] => 18/978204 [patent_app_country] => US [patent_app_date] => 2024-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20413 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18978204 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/978204
ETHERNET CODING METHOD AND APPARATUS Dec 11, 2024 Pending
Array ( [id] => 20310232 [patent_doc_number] => 20250327861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-23 [patent_title] => CIRCUIT SELF TEST APPARATUS AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/975781 [patent_app_country] => US [patent_app_date] => 2024-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18975781 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/975781
CIRCUIT SELF TEST APPARATUS AND OPERATING METHOD THEREOF Dec 9, 2024 Pending
Array ( [id] => 20461959 [patent_doc_number] => 20260011388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-08 [patent_title] => MEMORY DEVICE INCLUDING ERROR LOGGING DEVICE AND OPERATING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/975886 [patent_app_country] => US [patent_app_date] => 2024-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7938 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18975886 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/975886
MEMORY DEVICE INCLUDING ERROR LOGGING DEVICE AND OPERATING METHODS THEREOF Dec 9, 2024 Pending
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