Search

Syed I. Gheyas

Examiner (ID: 17108, Phone: (571)272-0592 , Office: P/2812 )

Most Active Art Unit
2812
Art Unit(s)
2893, 2812, 2821
Total Applications
844
Issued Applications
669
Pending Applications
87
Abandoned Applications
118

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16715572 [patent_doc_number] => 20210082719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => CONDUCTIVE FLUID DISCHARGE HEAD [patent_app_type] => utility [patent_app_number] => 16/775315 [patent_app_country] => US [patent_app_date] => 2020-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4046 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16775315 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/775315
CONDUCTIVE FLUID DISCHARGE HEAD Jan 28, 2020 Abandoned
Array ( [id] => 16593961 [patent_doc_number] => 10903238 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/750237 [patent_app_country] => US [patent_app_date] => 2020-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 28 [patent_no_of_words] => 3960 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16750237 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/750237
Semiconductor device and manufacturing method thereof Jan 22, 2020 Issued
Array ( [id] => 16959255 [patent_doc_number] => 11063139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-13 [patent_title] => Heterojunction bipolar transistors with airgap isolation [patent_app_type] => utility [patent_app_number] => 16/748055 [patent_app_country] => US [patent_app_date] => 2020-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4556 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16748055 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/748055
Heterojunction bipolar transistors with airgap isolation Jan 20, 2020 Issued
Array ( [id] => 16981807 [patent_doc_number] => 20210226044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => LATERAL HETEROJUNCTION BIPOLAR TRANSISTORS WITH ASYMMETRIC JUNCTIONS [patent_app_type] => utility [patent_app_number] => 16/745833 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16745833 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/745833
Lateral heterojunction bipolar transistors with asymmetric junctions Jan 16, 2020 Issued
Array ( [id] => 17424476 [patent_doc_number] => 11257940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => Group III HEMT and capacitor that share structural features [patent_app_type] => utility [patent_app_number] => 16/741835 [patent_app_country] => US [patent_app_date] => 2020-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 8544 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16741835 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/741835
Group III HEMT and capacitor that share structural features Jan 13, 2020 Issued
Array ( [id] => 16951934 [patent_doc_number] => 20210210626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => BIPOLAR TRANSISTOR AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/734476 [patent_app_country] => US [patent_app_date] => 2020-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6836 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16734476 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/734476
Bipolar transistor and method for forming the same Jan 5, 2020 Issued
Array ( [id] => 16724065 [patent_doc_number] => 20210091212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => ASYMMETRICAL LATERAL HETEROJUNCTION BIPOLAR TRANSISTORS [patent_app_type] => utility [patent_app_number] => 16/733528 [patent_app_country] => US [patent_app_date] => 2020-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3622 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16733528 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/733528
Asymmetrical lateral heterojunction bipolar transistors Jan 2, 2020 Issued
Array ( [id] => 17270494 [patent_doc_number] => 11195925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Heterojunction bipolar transistors [patent_app_type] => utility [patent_app_number] => 16/732755 [patent_app_country] => US [patent_app_date] => 2020-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4169 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16732755 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/732755
Heterojunction bipolar transistors Jan 1, 2020 Issued
Array ( [id] => 16865823 [patent_doc_number] => 11024576 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-01 [patent_title] => Semiconductor package with underfill between a sensor coil and a semiconductor die [patent_app_type] => utility [patent_app_number] => 16/732296 [patent_app_country] => US [patent_app_date] => 2019-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 4568 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16732296 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/732296
Semiconductor package with underfill between a sensor coil and a semiconductor die Dec 30, 2019 Issued
Array ( [id] => 16272483 [patent_doc_number] => 20200273971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => INSULATED-GATE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/726289 [patent_app_country] => US [patent_app_date] => 2019-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7215 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16726289 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/726289
Insulated-gate semiconductor device and method of manufacturing the same Dec 23, 2019 Issued
Array ( [id] => 16920709 [patent_doc_number] => 20210193801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/721752 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11992 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16721752 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/721752
Semiconductor device and manufacturing method thereof Dec 18, 2019 Issued
Array ( [id] => 18464345 [patent_doc_number] => 11688639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Semiconductor device and method [patent_app_type] => utility [patent_app_number] => 16/715854 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4864 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715854 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/715854
Semiconductor device and method Dec 15, 2019 Issued
Array ( [id] => 17683443 [patent_doc_number] => 11367708 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => Microelectronic devices designed with efficient partitioning of high frequency communication devices integrated on a package fabric [patent_app_type] => utility [patent_app_number] => 16/714502 [patent_app_country] => US [patent_app_date] => 2019-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6086 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714502 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/714502
Microelectronic devices designed with efficient partitioning of high frequency communication devices integrated on a package fabric Dec 12, 2019 Issued
Array ( [id] => 16873741 [patent_doc_number] => 20210167208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => SEMICONDUCTOR TRANSISTOR AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/711442 [patent_app_country] => US [patent_app_date] => 2019-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16711442 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/711442
Semiconductor transistor and fabrication method thereof Dec 11, 2019 Issued
Array ( [id] => 16073419 [patent_doc_number] => 20200190696 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => LOW ETCH PIT DENSITY 6 INCH SEMI-INSULATING GALLIUM ARSENIDE WAFERS [patent_app_type] => utility [patent_app_number] => 16/711019 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3517 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16711019 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/711019
Low etch pit density 6 inch semi-insulating gallium arsenide wafers Dec 10, 2019 Issued
Array ( [id] => 17002657 [patent_doc_number] => 11081480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Semiconductor structure, capacitor structure thereof and manufacturing method of the same [patent_app_type] => utility [patent_app_number] => 16/709207 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7289 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16709207 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/709207
Semiconductor structure, capacitor structure thereof and manufacturing method of the same Dec 9, 2019 Issued
Array ( [id] => 16789220 [patent_doc_number] => 10991659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Substrate-less integrated components [patent_app_type] => utility [patent_app_number] => 16/704671 [patent_app_country] => US [patent_app_date] => 2019-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 61 [patent_no_of_words] => 8340 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16704671 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/704671
Substrate-less integrated components Dec 4, 2019 Issued
Array ( [id] => 16625072 [patent_doc_number] => 20210043725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => P-Type MOSFET and Method for Manufacturing Same [patent_app_type] => utility [patent_app_number] => 16/704335 [patent_app_country] => US [patent_app_date] => 2019-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16704335 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/704335
P-type MOSFET and method for manufacturing same Dec 4, 2019 Issued
Array ( [id] => 16016425 [patent_doc_number] => 20200183056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => Power Semiconductor Module and Method for Producing a Power Semiconductor Module [patent_app_type] => utility [patent_app_number] => 16/704873 [patent_app_country] => US [patent_app_date] => 2019-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16704873 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/704873
Power semiconductor module and method for producing a power semiconductor module Dec 4, 2019 Issued
Array ( [id] => 16760005 [patent_doc_number] => 10978563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Semiconductor device and method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 16/698476 [patent_app_country] => US [patent_app_date] => 2019-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 88 [patent_no_of_words] => 35960 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16698476 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/698476
Semiconductor device and method for manufacturing semiconductor device Nov 26, 2019 Issued
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