Tammara R. Peyton

Array ( [id] => 19739931 [patent_doc_number] => 12216764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Smart network interface controller certificate management [patent_app_type] => utility [patent_app_number] => 17/728597 [patent_app_country] => US [patent_app_date] => 2022-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4658 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17728597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18912065 [patent_doc_number] => 11875044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Direct memory access using joint test action group (JTAG) cells addressing [patent_app_type] => utility [patent_app_number] => 17/722854 [patent_app_country] => US [patent_app_date] => 2022-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7253 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17722854 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19152842 [patent_doc_number] => 11977753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => BIOS NVRAM storage extension system and method for secure and seamless access for various boot architectures [patent_app_type] => utility [patent_app_number] => 17/659034 [patent_app_country] => US [patent_app_date] => 2022-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6329 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17659034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18599085 [patent_doc_number] => 20230273885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => MAINTAINING A RUNNING SOFTWARE SERVICE THROUGH A SOFT REBOOT [patent_app_type] => utility [patent_app_number] => 17/681932 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17681932 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20305400 [patent_doc_number] => 12451399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Integrated thermal solution to enable operation of embedded processors in sub-zero temperatures [patent_app_type] => utility [patent_app_number] => 17/673487 [patent_app_country] => US [patent_app_date] => 2022-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 7486 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17673487 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20305400 [patent_doc_number] => 12451399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Integrated thermal solution to enable operation of embedded processors in sub-zero temperatures [patent_app_type] => utility [patent_app_number] => 17/673487 [patent_app_country] => US [patent_app_date] => 2022-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 7486 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17673487 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18683986 [patent_doc_number] => 11779696 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => System and method for insulin pump medical device including a slider assembly wherein images on display allow for highlighting and magnifying images [patent_app_type] => utility [patent_app_number] => 17/670646 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 4865 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670646 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18553781 [patent_doc_number] => 20230251793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => HUB FOR MULTI-CHIP SENSOR SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/668052 [patent_app_country] => US [patent_app_date] => 2022-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17668052 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18765535 [patent_doc_number] => 11815933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Image data based media type selection based on a first identified attribute of the initial image data [patent_app_type] => utility [patent_app_number] => 17/591977 [patent_app_country] => US [patent_app_date] => 2022-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10841 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17591977 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18606647 [patent_doc_number] => 11748111 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Basic input output system (BIOS)--identify memory size or node address range mirroring system [patent_app_type] => utility [patent_app_number] => 17/589737 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6420 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17589737 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20273635 [patent_doc_number] => 12443417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Orchestrating multiple runtime engines in single environment, involves executing second runtime engine simultaneously with first runtime engine to generate dashboard graphical user interface [patent_app_type] => utility [patent_app_number] => 17/649498 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 12275 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649498 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17613926 [patent_doc_number] => 20220156206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => INTEGRATED CIRCUIT I/O INTEGRITY AND DEGRADATION MONITORING [patent_app_type] => utility [patent_app_number] => 17/589758 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11937 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17589758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17884965 [patent_doc_number] => 20220300442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => PERIPHERAL COMPONENT INTERCONNECT EXPRESS DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/567609 [patent_app_country] => US [patent_app_date] => 2022-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17567609 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18873556 [patent_doc_number] => 11861370 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Automotive boot optimization by utilizing multiple phases of boot-up procedures [patent_app_type] => utility [patent_app_number] => 17/646254 [patent_app_country] => US [patent_app_date] => 2021-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 13441 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17646254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18074463 [patent_doc_number] => 11533311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Automatically deployed information technology (IT) system and method [patent_app_type] => utility [patent_app_number] => 17/558738 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 64 [patent_no_of_words] => 43746 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558738 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18839394 [patent_doc_number] => 11847468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Data defragmentation for a system boot procedure having random indexes indicating a relationship between sequential logical addresses and random logical addresses [patent_app_type] => utility [patent_app_number] => 17/645687 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 12743 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17645687 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18457493 [patent_doc_number] => 20230198775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => MEMORY DEVICE WITH SECURE BOOT UPDATES AND SELF-RECOVERY [patent_app_type] => utility [patent_app_number] => 17/554370 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17554370 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18781072 [patent_doc_number] => 11822812 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Method and apparatus for distributed direct memory access for system on chip performing read or write operations [patent_app_type] => utility [patent_app_number] => 17/554479 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2813 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17554479 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18803340 [patent_doc_number] => 11836499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => System and method of operating system executables with information handling systems (IHS) [patent_app_type] => utility [patent_app_number] => 17/644715 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 20424 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17644715 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19152985 [patent_doc_number] => 11977897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Mounting position of NVMe or SATA on a backplane using bay slot ID [patent_app_type] => utility [patent_app_number] => 17/551853 [patent_app_country] => US [patent_app_date] => 2021-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4305 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17551853 [rel_patent_id] =>[rel_patent_doc_number] =>)