Search

Tan Nguyen

Examiner (ID: 11472, Phone: (571)272-1789 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2511, 3103, 2818, 2309, 2827
Total Applications
3340
Issued Applications
3151
Pending Applications
45
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17107669 [patent_doc_number] => 11127897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Nonvolatile memory cells having an embedded selection element and nonvolatile memory cell arrays including the nonvolatile memory cells [patent_app_type] => utility [patent_app_number] => 16/891291 [patent_app_country] => US [patent_app_date] => 2020-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 19378 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16891291 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/891291
Nonvolatile memory cells having an embedded selection element and nonvolatile memory cell arrays including the nonvolatile memory cells Jun 2, 2020 Issued
Array ( [id] => 16440150 [patent_doc_number] => 20200357477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES [patent_app_type] => utility [patent_app_number] => 16/886977 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16886977 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/886977
Non-volatile semiconductor memory having multiple external power supplies May 28, 2020 Issued
Array ( [id] => 17262370 [patent_doc_number] => 20210375355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => Circuit in Memory Device for Parasitic Resistance Reduction [patent_app_type] => utility [patent_app_number] => 16/888509 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8565 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16888509 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/888509
Circuit in memory device for parasitic resistance reduction May 28, 2020 Issued
Array ( [id] => 19328626 [patent_doc_number] => 12046315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Memory built-in self-test with automated reference trim feedback for memory sensing [patent_app_type] => utility [patent_app_number] => 17/756963 [patent_app_country] => US [patent_app_date] => 2020-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6941 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17756963 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/756963
Memory built-in self-test with automated reference trim feedback for memory sensing May 27, 2020 Issued
Array ( [id] => 17018166 [patent_doc_number] => 11087811 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-10 [patent_title] => NVM synaptic element with gradual reset capability [patent_app_type] => utility [patent_app_number] => 16/885618 [patent_app_country] => US [patent_app_date] => 2020-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8629 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885618 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/885618
NVM synaptic element with gradual reset capability May 27, 2020 Issued
Array ( [id] => 16723516 [patent_doc_number] => 20210090663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/886053 [patent_app_country] => US [patent_app_date] => 2020-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7526 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16886053 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/886053
Semiconductor device May 27, 2020 Issued
Array ( [id] => 16911216 [patent_doc_number] => 11043264 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Static random access memory method [patent_app_type] => utility [patent_app_number] => 16/884774 [patent_app_country] => US [patent_app_date] => 2020-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8113 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16884774 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/884774
Static random access memory method May 26, 2020 Issued
Array ( [id] => 16300835 [patent_doc_number] => 20200286558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => RESISTANCE CHANGE MEMORY CELL CIRCUITS AND METHODS [patent_app_type] => utility [patent_app_number] => 16/883309 [patent_app_country] => US [patent_app_date] => 2020-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8131 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16883309 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/883309
Resistance change memory cell circuits and methods May 25, 2020 Issued
Array ( [id] => 17032559 [patent_doc_number] => 11094376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => In-memory compute array with integrated bias elements [patent_app_type] => utility [patent_app_number] => 16/882024 [patent_app_country] => US [patent_app_date] => 2020-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11311 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882024 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/882024
In-memory compute array with integrated bias elements May 21, 2020 Issued
Array ( [id] => 17239979 [patent_doc_number] => 11183874 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-23 [patent_title] => Power grid monitoring using network devices in a cable network [patent_app_type] => utility [patent_app_number] => 16/880870 [patent_app_country] => US [patent_app_date] => 2020-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 18460 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16880870 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/880870
Power grid monitoring using network devices in a cable network May 20, 2020 Issued
Array ( [id] => 17002700 [patent_doc_number] => 11081523 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-03 [patent_title] => Memory devices and methods of forming memory devices [patent_app_type] => utility [patent_app_number] => 15/931623 [patent_app_country] => US [patent_app_date] => 2020-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15931623 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/931623
Memory devices and methods of forming memory devices May 13, 2020 Issued
Array ( [id] => 16896091 [patent_doc_number] => 11037652 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Controller to detect malfunctioning address of memory device [patent_app_type] => utility [patent_app_number] => 16/870759 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 9178 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16870759 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/870759
Controller to detect malfunctioning address of memory device May 7, 2020 Issued
Array ( [id] => 16819655 [patent_doc_number] => 11004492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Cell bottom node reset in a memory array [patent_app_type] => utility [patent_app_number] => 16/869510 [patent_app_country] => US [patent_app_date] => 2020-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13600 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869510 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/869510
Cell bottom node reset in a memory array May 6, 2020 Issued
Array ( [id] => 17077737 [patent_doc_number] => 11114148 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-09-07 [patent_title] => Efficient ferroelectric random-access memory wordline driver, decoder, and related circuits [patent_app_type] => utility [patent_app_number] => 16/851026 [patent_app_country] => US [patent_app_date] => 2020-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4435 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16851026 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/851026
Efficient ferroelectric random-access memory wordline driver, decoder, and related circuits Apr 15, 2020 Issued
Array ( [id] => 16911211 [patent_doc_number] => 11043259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => System and method for in-memory compute [patent_app_type] => utility [patent_app_number] => 16/845644 [patent_app_country] => US [patent_app_date] => 2020-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 10242 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16845644 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/845644
System and method for in-memory compute Apr 9, 2020 Issued
Array ( [id] => 16495481 [patent_doc_number] => 10861528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/830426 [patent_app_country] => US [patent_app_date] => 2020-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 8830 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16830426 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/830426
Semiconductor memory device Mar 25, 2020 Issued
Array ( [id] => 16773755 [patent_doc_number] => 10984873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Memory device for stabilizing internal voltage and method of stabilizing internal voltage of the same [patent_app_type] => utility [patent_app_number] => 16/825302 [patent_app_country] => US [patent_app_date] => 2020-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10091 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16825302 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/825302
Memory device for stabilizing internal voltage and method of stabilizing internal voltage of the same Mar 19, 2020 Issued
Array ( [id] => 16803105 [patent_doc_number] => 10998056 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Memory system and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/825796 [patent_app_country] => US [patent_app_date] => 2020-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 10714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16825796 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/825796
Memory system and operating method thereof Mar 19, 2020 Issued
Array ( [id] => 16773767 [patent_doc_number] => 10984886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Reduced footprint fuse circuit [patent_app_type] => utility [patent_app_number] => 16/811717 [patent_app_country] => US [patent_app_date] => 2020-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7379 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16811717 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/811717
Reduced footprint fuse circuit Mar 5, 2020 Issued
Array ( [id] => 17047819 [patent_doc_number] => 11101009 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-24 [patent_title] => Systems and methods to convert memory to one-time programmable memory [patent_app_type] => utility [patent_app_number] => 16/808924 [patent_app_country] => US [patent_app_date] => 2020-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5261 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16808924 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/808924
Systems and methods to convert memory to one-time programmable memory Mar 3, 2020 Issued
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