Search

Tan Nguyen

Examiner (ID: 11472, Phone: (571)272-1789 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2511, 3103, 2818, 2309, 2827
Total Applications
3340
Issued Applications
3151
Pending Applications
45
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16521451 [patent_doc_number] => 10872674 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-22 [patent_title] => Regulation of voltage generation systems [patent_app_type] => utility [patent_app_number] => 16/722054 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10861 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16722054 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/722054
Regulation of voltage generation systems Dec 19, 2019 Issued
Array ( [id] => 16879742 [patent_doc_number] => 11029889 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-08 [patent_title] => Soft bit read mode selection for non-volatile memory [patent_app_type] => utility [patent_app_number] => 16/723192 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 20364 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723192 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/723192
Soft bit read mode selection for non-volatile memory Dec 19, 2019 Issued
Array ( [id] => 16372149 [patent_doc_number] => 10803915 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-13 [patent_title] => Semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/721348 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11751 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16721348 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/721348
Semiconductor devices Dec 18, 2019 Issued
Array ( [id] => 15938559 [patent_doc_number] => 20200160913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => 3D NAND MEMORY Z-DECODER [patent_app_type] => utility [patent_app_number] => 16/709322 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11720 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16709322 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/709322
3D NAND memory Z-decoder Dec 9, 2019 Issued
Array ( [id] => 16479356 [patent_doc_number] => 10854309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Memory system and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/703432 [patent_app_country] => US [patent_app_date] => 2019-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4561 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16703432 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/703432
Memory system and operating method thereof Dec 3, 2019 Issued
Array ( [id] => 16479351 [patent_doc_number] => 10854304 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-01 [patent_title] => Apparatus and methods for seeding operations concurrently with data line set operations [patent_app_type] => utility [patent_app_number] => 16/701238 [patent_app_country] => US [patent_app_date] => 2019-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14370 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16701238 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/701238
Apparatus and methods for seeding operations concurrently with data line set operations Dec 2, 2019 Issued
Array ( [id] => 16858503 [patent_doc_number] => 20210159248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => THREE-DIMENSIONAL FERROELECTRIC MEMORY ARRAY INCLUDING INTEGRATED GATE SELECTORS AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/694340 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15702 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16694340 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/694340
Three-dimensional ferroelectric memory array including integrated gate selectors and methods of forming the same Nov 24, 2019 Issued
Array ( [id] => 16644237 [patent_doc_number] => 10922093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Data processing device, processor core array and method for characterizing behavior of equipment under observation [patent_app_type] => utility [patent_app_number] => 16/687313 [patent_app_country] => US [patent_app_date] => 2019-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 11841 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16687313 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/687313
Data processing device, processor core array and method for characterizing behavior of equipment under observation Nov 17, 2019 Issued
Array ( [id] => 16707446 [patent_doc_number] => 10957388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Systems, methods and devices for programming a multilevel resistive memory cell [patent_app_type] => utility [patent_app_number] => 16/671123 [patent_app_country] => US [patent_app_date] => 2019-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5839 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16671123 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/671123
Systems, methods and devices for programming a multilevel resistive memory cell Oct 30, 2019 Issued
Array ( [id] => 15502913 [patent_doc_number] => 20200051645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/657365 [patent_app_country] => US [patent_app_date] => 2019-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12031 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16657365 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/657365
Semiconductor memory device and method for operating the same Oct 17, 2019 Issued
Array ( [id] => 15624927 [patent_doc_number] => 20200082868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => MULTILAYERED NETWORK OF POWER SUPPLY LINES [patent_app_type] => utility [patent_app_number] => 16/656870 [patent_app_country] => US [patent_app_date] => 2019-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2766 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16656870 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/656870
Multilayered network of power supply lines Oct 17, 2019 Issued
Array ( [id] => 16502297 [patent_doc_number] => 10867691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Controller to detect malfunctioning address of memory device [patent_app_type] => utility [patent_app_number] => 16/600093 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 9154 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600093 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/600093
Controller to detect malfunctioning address of memory device Oct 10, 2019 Issued
Array ( [id] => 15597147 [patent_doc_number] => 20200075108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => CAPACITIVE VOLTAGE DIVIDER FOR POWER MANAGEMENT [patent_app_type] => utility [patent_app_number] => 16/596888 [patent_app_country] => US [patent_app_date] => 2019-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9175 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16596888 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/596888
Capacitive voltage divider for power management Oct 8, 2019 Issued
Array ( [id] => 16495521 [patent_doc_number] => 10861568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Method and apparatus for data refresh for analog non-volatile memory in deep learning neural network [patent_app_type] => utility [patent_app_number] => 16/590798 [patent_app_country] => US [patent_app_date] => 2019-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 6478 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16590798 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/590798
Method and apparatus for data refresh for analog non-volatile memory in deep learning neural network Oct 1, 2019 Issued
Array ( [id] => 16347730 [patent_doc_number] => 20200312381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => NONVOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/590326 [patent_app_country] => US [patent_app_date] => 2019-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10652 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16590326 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/590326
Nonvolatile memory device Sep 30, 2019 Issued
Array ( [id] => 16463864 [patent_doc_number] => 10847221 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Memory device and method thereof [patent_app_type] => utility [patent_app_number] => 16/590232 [patent_app_country] => US [patent_app_date] => 2019-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16590232 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/590232
Memory device and method thereof Sep 30, 2019 Issued
Array ( [id] => 16536248 [patent_doc_number] => 10878861 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Variable filter capacitance [patent_app_type] => utility [patent_app_number] => 16/584547 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 16014 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16584547 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/584547
Variable filter capacitance Sep 25, 2019 Issued
Array ( [id] => 16293312 [patent_doc_number] => 10770165 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-08 [patent_title] => No-verify programming followed by short circuit test in memory device [patent_app_type] => utility [patent_app_number] => 16/571844 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 28 [patent_no_of_words] => 16956 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571844 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/571844
No-verify programming followed by short circuit test in memory device Sep 15, 2019 Issued
Array ( [id] => 15717783 [patent_doc_number] => 20200105659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/572062 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5603 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572062 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572062
Semiconductor device Sep 15, 2019 Issued
Array ( [id] => 16409806 [patent_doc_number] => 10818370 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-27 [patent_title] => Health monitoring for capacitor array in storage devices [patent_app_type] => utility [patent_app_number] => 16/570000 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570000 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570000
Health monitoring for capacitor array in storage devices Sep 12, 2019 Issued
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