Search

Tan Nguyen

Examiner (ID: 14005, Phone: (571)272-1789 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 3103, 2511, 2309, 2827
Total Applications
3335
Issued Applications
3151
Pending Applications
40
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16148293 [patent_doc_number] => 10707226 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-07 [patent_title] => Source side program, method, and apparatus for 3D NAND [patent_app_type] => utility [patent_app_number] => 16/453268 [patent_app_country] => US [patent_app_date] => 2019-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 6103 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16453268 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/453268
Source side program, method, and apparatus for 3D NAND Jun 25, 2019 Issued
Array ( [id] => 16278949 [patent_doc_number] => 10761980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-01 [patent_title] => Trim setting determination on a memory device [patent_app_type] => utility [patent_app_number] => 16/442792 [patent_app_country] => US [patent_app_date] => 2019-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4832 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16442792 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/442792
Trim setting determination on a memory device Jun 16, 2019 Issued
Array ( [id] => 15902447 [patent_doc_number] => 20200150743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => ELECTRONIC DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/439159 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9415 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439159 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/439159
Electronic device and operation method thereof Jun 11, 2019 Issued
Array ( [id] => 14903723 [patent_doc_number] => 20190295627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => APPARATUSES AND METHODS FOR REFRESH CONTROL [patent_app_type] => utility [patent_app_number] => 16/438322 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16438322 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/438322
Apparatuses and methods for refresh control Jun 10, 2019 Issued
Array ( [id] => 15273897 [patent_doc_number] => 20190385683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/434264 [patent_app_country] => US [patent_app_date] => 2019-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7122 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16434264 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/434264
Semiconductor device Jun 6, 2019 Issued
Array ( [id] => 14874665 [patent_doc_number] => 20190287574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => MEMORY DEVICE AND OPERATING METHOD OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/433178 [patent_app_country] => US [patent_app_date] => 2019-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9139 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16433178 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/433178
Memory device and operating method of memory device Jun 5, 2019 Issued
Array ( [id] => 15153907 [patent_doc_number] => 20190355431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => ONE CHECK FAIL BYTE (CFBYTE) SCHEME [patent_app_type] => utility [patent_app_number] => 16/430086 [patent_app_country] => US [patent_app_date] => 2019-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6992 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16430086 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/430086
One check fail byte (CFBYTE) scheme Jun 2, 2019 Issued
Array ( [id] => 15300183 [patent_doc_number] => 20190393227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => Integrated Arrangements of Pull-Up Transistors and Pull-Down Transistors, and Integrated Static Memory [patent_app_type] => utility [patent_app_number] => 16/427176 [patent_app_country] => US [patent_app_date] => 2019-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4966 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16427176 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/427176
Integrated arrangements of pull-up transistors and pull-down transistors, and integrated static memory May 29, 2019 Issued
Array ( [id] => 14903715 [patent_doc_number] => 20190295623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => FERROELECTRIC MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/425769 [patent_app_country] => US [patent_app_date] => 2019-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21635 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16425769 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/425769
Ferroelectric memory cells May 28, 2019 Issued
Array ( [id] => 14903715 [patent_doc_number] => 20190295623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => FERROELECTRIC MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/425769 [patent_app_country] => US [patent_app_date] => 2019-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21635 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16425769 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/425769
Ferroelectric memory cells May 28, 2019 Issued
Array ( [id] => 14903715 [patent_doc_number] => 20190295623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => FERROELECTRIC MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/425769 [patent_app_country] => US [patent_app_date] => 2019-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21635 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16425769 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/425769
Ferroelectric memory cells May 28, 2019 Issued
Array ( [id] => 14903715 [patent_doc_number] => 20190295623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => FERROELECTRIC MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/425769 [patent_app_country] => US [patent_app_date] => 2019-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21635 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16425769 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/425769
Ferroelectric memory cells May 28, 2019 Issued
Array ( [id] => 15703047 [patent_doc_number] => 10607710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-31 [patent_title] => Method and apparatus for data refresh for analog non-volatile memory in deep learning neural network [patent_app_type] => utility [patent_app_number] => 16/414714 [patent_app_country] => US [patent_app_date] => 2019-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 6466 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16414714 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/414714
Method and apparatus for data refresh for analog non-volatile memory in deep learning neural network May 15, 2019 Issued
Array ( [id] => 16172615 [patent_doc_number] => 10714191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Determining data states of memory cells [patent_app_type] => utility [patent_app_number] => 16/410406 [patent_app_country] => US [patent_app_date] => 2019-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 9507 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16410406 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/410406
Determining data states of memory cells May 12, 2019 Issued
Array ( [id] => 16047645 [patent_doc_number] => 10685701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-16 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 16/407084 [patent_app_country] => US [patent_app_date] => 2019-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3316 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16407084 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/407084
Semiconductor storage device May 7, 2019 Issued
Array ( [id] => 17056070 [patent_doc_number] => 20210265504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-26 [patent_title] => MEMORY DEVICE, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/053467 [patent_app_country] => US [patent_app_date] => 2019-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30718 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17053467 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/053467
Memory device, semiconductor device, and electronic device May 6, 2019 Issued
Array ( [id] => 16147687 [patent_doc_number] => 10706918 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Memory with symmetric read current profile and read method thereof [patent_app_type] => utility [patent_app_number] => 16/390517 [patent_app_country] => US [patent_app_date] => 2019-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7153 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16390517 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/390517
Memory with symmetric read current profile and read method thereof Apr 21, 2019 Issued
Array ( [id] => 17772467 [patent_doc_number] => 11404419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Memory device comprising an electrically floating body transistor [patent_app_type] => utility [patent_app_number] => 17/047623 [patent_app_country] => US [patent_app_date] => 2019-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 63 [patent_no_of_words] => 19836 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17047623 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/047623
Memory device comprising an electrically floating body transistor Apr 16, 2019 Issued
Array ( [id] => 14968557 [patent_doc_number] => 20190311757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => CELL BOTTOM NODE RESET IN MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 16/387220 [patent_app_country] => US [patent_app_date] => 2019-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16387220 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/387220
Cell bottom node reset in memory array Apr 16, 2019 Issued
Array ( [id] => 16132039 [patent_doc_number] => 10699786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Resistance change memory cell circuits and methods [patent_app_type] => utility [patent_app_number] => 16/378196 [patent_app_country] => US [patent_app_date] => 2019-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8122 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16378196 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/378196
Resistance change memory cell circuits and methods Apr 7, 2019 Issued
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