Search

Tan Nguyen

Examiner (ID: 14005, Phone: (571)272-1789 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 3103, 2511, 2309, 2827
Total Applications
3335
Issued Applications
3151
Pending Applications
40
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11079074 [patent_doc_number] => 20160276037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'METHOD AND APPARATUS FOR READING DATA STORED IN FLASH MEMORY BY REFERRING TO BINARY DIGIT DISTRIBUTION CHARACTERISTICS OF BIT SEQUENCES READ FROM FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 15/170952 [patent_app_country] => US [patent_app_date] => 2016-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 21106 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15170952 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/170952
Method and apparatus for reading data stored in flash memory by referring to binary digit distribution characteristics of bit sequences read from flash memory Jun 1, 2016 Issued
Array ( [id] => 11079069 [patent_doc_number] => 20160276032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND DATA ERASING METHOD' [patent_app_type] => utility [patent_app_number] => 15/167918 [patent_app_country] => US [patent_app_date] => 2016-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 77 [patent_figures_cnt] => 77 [patent_no_of_words] => 43280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15167918 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/167918
Semiconductor memory device and data erasing method May 26, 2016 Issued
Array ( [id] => 11681116 [patent_doc_number] => 09679650 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-13 [patent_title] => '3D NAND memory Z-decoder' [patent_app_type] => utility [patent_app_number] => 15/148408 [patent_app_country] => US [patent_app_date] => 2016-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 27 [patent_no_of_words] => 11996 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15148408 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/148408
3D NAND memory Z-decoder May 5, 2016 Issued
Array ( [id] => 11333519 [patent_doc_number] => 09524768 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-20 [patent_title] => 'Control circuit and memory device including the same' [patent_app_type] => utility [patent_app_number] => 15/148564 [patent_app_country] => US [patent_app_date] => 2016-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 9607 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15148564 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/148564
Control circuit and memory device including the same May 5, 2016 Issued
Array ( [id] => 11564482 [patent_doc_number] => 09627075 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-18 [patent_title] => 'Semiconductor memory device and semiconductor system' [patent_app_type] => utility [patent_app_number] => 15/147338 [patent_app_country] => US [patent_app_date] => 2016-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 10098 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15147338 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/147338
Semiconductor memory device and semiconductor system May 4, 2016 Issued
Array ( [id] => 11132117 [patent_doc_number] => 20160329092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-10 [patent_title] => 'SRAM MULTI-CELL OPERATIONS' [patent_app_type] => utility [patent_app_number] => 15/146908 [patent_app_country] => US [patent_app_date] => 2016-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4733 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15146908 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/146908
SRAM multi-cell operations May 4, 2016 Issued
Array ( [id] => 11307414 [patent_doc_number] => 09514818 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-06 [patent_title] => 'Memristor using parallel asymmetrical transistors having shared floating gate and diode' [patent_app_type] => utility [patent_app_number] => 15/146742 [patent_app_country] => US [patent_app_date] => 2016-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 8749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15146742 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/146742
Memristor using parallel asymmetrical transistors having shared floating gate and diode May 3, 2016 Issued
Array ( [id] => 11043283 [patent_doc_number] => 20160240239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/138318 [patent_app_country] => US [patent_app_date] => 2016-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 19005 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15138318 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/138318
Semiconductor device and electronic device Apr 25, 2016 Issued
Array ( [id] => 11103634 [patent_doc_number] => 20160300604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'STT-MRAM Bitcell for Embedded Flash Applications' [patent_app_type] => utility [patent_app_number] => 15/095170 [patent_app_country] => US [patent_app_date] => 2016-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6092 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15095170 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/095170
STT-MRAM bitcell for embedded flash applications Apr 10, 2016 Issued
Array ( [id] => 11411486 [patent_doc_number] => 09558797 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-31 [patent_title] => 'Method and apparatus for controlling current in an array cell' [patent_app_type] => utility [patent_app_number] => 15/095482 [patent_app_country] => US [patent_app_date] => 2016-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6923 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15095482 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/095482
Method and apparatus for controlling current in an array cell Apr 10, 2016 Issued
Array ( [id] => 11132109 [patent_doc_number] => 20160329085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-10 [patent_title] => 'MEMORY SYSTEM AND MEMORY PHYSICAL LAYER INTERFACE CIRCUIT' [patent_app_type] => utility [patent_app_number] => 15/093758 [patent_app_country] => US [patent_app_date] => 2016-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3582 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093758 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/093758
Memory system and memory physical layer interface circuit Apr 7, 2016 Issued
Array ( [id] => 11391621 [patent_doc_number] => 09552871 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-24 [patent_title] => 'Low power high performance electrical circuits' [patent_app_type] => utility [patent_app_number] => 15/094960 [patent_app_country] => US [patent_app_date] => 2016-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 6841 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15094960 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/094960
Low power high performance electrical circuits Apr 7, 2016 Issued
Array ( [id] => 11466517 [patent_doc_number] => 09583155 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-28 [patent_title] => 'Single-ended signal slicer with a wide input voltage range' [patent_app_type] => utility [patent_app_number] => 15/093876 [patent_app_country] => US [patent_app_date] => 2016-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7433 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093876 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/093876
Single-ended signal slicer with a wide input voltage range Apr 7, 2016 Issued
Array ( [id] => 14259857 [patent_doc_number] => 10279474 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => Method for improving operation of a robot [patent_app_type] => utility [patent_app_number] => 15/084705 [patent_app_country] => US [patent_app_date] => 2016-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5207 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15084705 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/084705
Method for improving operation of a robot Mar 29, 2016 Issued
Array ( [id] => 15234463 [patent_doc_number] => 10504962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Unipolar current switching in perpendicular magnetic tunnel junction (pMTJ) devices through reduced bipolar coercivity [patent_app_type] => utility [patent_app_number] => 16/069122 [patent_app_country] => US [patent_app_date] => 2016-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6612 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16069122 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/069122
Unipolar current switching in perpendicular magnetic tunnel junction (pMTJ) devices through reduced bipolar coercivity Mar 27, 2016 Issued
Array ( [id] => 10999926 [patent_doc_number] => 20160196874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-07 [patent_title] => 'RESISTIVE RANDOM-ACCESS MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 15/070716 [patent_app_country] => US [patent_app_date] => 2016-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13156 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15070716 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/070716
Resistive random-access memory cells Mar 14, 2016 Issued
Array ( [id] => 11353472 [patent_doc_number] => 20160372212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'TEST APPARATUS, TEST METHOD AND METHOD OF MANUFACTURING MAGNETIC MEMORY' [patent_app_type] => utility [patent_app_number] => 15/067774 [patent_app_country] => US [patent_app_date] => 2016-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9728 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15067774 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/067774
TEST APPARATUS, TEST METHOD AND METHOD OF MANUFACTURING MAGNETIC MEMORY Mar 10, 2016 Abandoned
Array ( [id] => 11502606 [patent_doc_number] => 20170076791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/065846 [patent_app_country] => US [patent_app_date] => 2016-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9638 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15065846 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/065846
SEMICONDUCTOR MEMORY DEVICE Mar 8, 2016 Abandoned
Array ( [id] => 11502576 [patent_doc_number] => 20170076761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/065852 [patent_app_country] => US [patent_app_date] => 2016-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9631 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15065852 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/065852
Memory device Mar 8, 2016 Issued
Array ( [id] => 11599504 [patent_doc_number] => 09646680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'Power gate for latch-up prevention' [patent_app_type] => utility [patent_app_number] => 15/060150 [patent_app_country] => US [patent_app_date] => 2016-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2079 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060150 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/060150
Power gate for latch-up prevention Mar 2, 2016 Issued
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