Search

Tan Nguyen

Examiner (ID: 11472, Phone: (571)272-1789 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2511, 3103, 2818, 2309, 2827
Total Applications
3340
Issued Applications
3151
Pending Applications
45
Abandoned Applications
149

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19315946 [patent_doc_number] => 12041782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Memory device with ferroelectric charge trapping layer [patent_app_type] => utility [patent_app_number] => 17/817550 [patent_app_country] => US [patent_app_date] => 2022-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4832 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17817550 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/817550
Memory device with ferroelectric charge trapping layer Aug 3, 2022 Issued
Array ( [id] => 18008210 [patent_doc_number] => 20220366977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => MEMORY DEVICE AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/876379 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876379 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876379
Memory device and method thereof Jul 27, 2022 Issued
Array ( [id] => 18823094 [patent_doc_number] => 20230397435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => MEMORY DEVICE ASSEMBLY WITH NON-IMPINGED LEAKER DEVICES [patent_app_type] => utility [patent_app_number] => 17/815420 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18610 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815420 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815420
Memory device assembly with non-impinged leaker devices Jul 26, 2022 Issued
Array ( [id] => 19213461 [patent_doc_number] => 12002533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => System, method and/or apparatus for magnetic memory testing [patent_app_type] => utility [patent_app_number] => 17/814418 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7865 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814418 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814418
System, method and/or apparatus for magnetic memory testing Jul 21, 2022 Issued
Array ( [id] => 18926779 [patent_doc_number] => 20240029783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR DEVICE HAVING BUFFER CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/814154 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814154 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814154
Semiconductor device having buffer circuit Jul 20, 2022 Issued
Array ( [id] => 18812223 [patent_doc_number] => 20230386560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => METHOD FOR SENSE MARGIN DETECTION FOR SENSE AMPLIFIER AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/868774 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868774 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868774
Method for sense margin detection for sense amplifier and electronic device Jul 19, 2022 Issued
Array ( [id] => 18926786 [patent_doc_number] => 20240029790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => DEVICE WITH RECONFIGURABLE SHORT TERM DATA RETENTION [patent_app_type] => utility [patent_app_number] => 17/813650 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5662 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17813650 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/813650
Device with reconfigurable short term data retention Jul 19, 2022 Issued
Array ( [id] => 18905769 [patent_doc_number] => 20240021254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => MEMORY DEVICE AND DATA SEARCH METHOD FOR IN-MEMORY SEARCH [patent_app_type] => utility [patent_app_number] => 17/812243 [patent_app_country] => US [patent_app_date] => 2022-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17812243 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/812243
Memory device and data search method for in-memory search Jul 12, 2022 Issued
Array ( [id] => 18920374 [patent_doc_number] => 11882684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Memory device comprising an electrically floating body transistor [patent_app_type] => utility [patent_app_number] => 17/863848 [patent_app_country] => US [patent_app_date] => 2022-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 63 [patent_no_of_words] => 19847 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17863848 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/863848
Memory device comprising an electrically floating body transistor Jul 12, 2022 Issued
Array ( [id] => 18614194 [patent_doc_number] => 20230280931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => DATA WRITING CIRCUIT, DATA WRITING METHOD, AND MEMORY [patent_app_type] => utility [patent_app_number] => 17/855848 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8520 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855848 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855848
Data writing circuit, data writing method, and memory Jun 30, 2022 Issued
Array ( [id] => 19328591 [patent_doc_number] => 12046280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/809642 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 43 [patent_no_of_words] => 11327 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809642 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/809642
Semiconductor structure and manufacturing method thereof Jun 28, 2022 Issued
Array ( [id] => 18848491 [patent_doc_number] => 20230410895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => MEMORY ARRAY ARCHITECTURE HAVING SENSING CIRCUITRY TO DRIVE TWO MATRICES FOR HIGHER ARRAY EFFICIENCY [patent_app_type] => utility [patent_app_number] => 17/842492 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5782 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842492 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/842492
Memory array architecture having sensing circuitry to drive two matrices for higher array efficiency Jun 15, 2022 Issued
Array ( [id] => 19370301 [patent_doc_number] => 12062391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Apparatus and method for controlling refresh operation [patent_app_type] => utility [patent_app_number] => 17/842370 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9890 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842370 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/842370
Apparatus and method for controlling refresh operation Jun 15, 2022 Issued
Array ( [id] => 18820836 [patent_doc_number] => 20230395177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => ENABLING OR DISABLING ON-DIE ERROR-CORRECTING CODE FOR A MEMORY BUILT-IN SELF-TEST [patent_app_type] => utility [patent_app_number] => 17/807314 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16766 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807314 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/807314
Enabling or disabling on-die error-correcting code for a memory built-in self-test Jun 15, 2022 Issued
Array ( [id] => 17917200 [patent_doc_number] => 20220319596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => COMPUTE-IN-MEMORY ARRAY AND MODULE, AND DATA COMPUTING METHOD [patent_app_type] => utility [patent_app_number] => 17/841689 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4793 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17841689 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/841689
Compute-in-memory array and module, and data computing method Jun 15, 2022 Issued
Array ( [id] => 18500286 [patent_doc_number] => 20230223071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => CONTROL AMPLIFYING CIRCUIT, SENSE AMPLIFIER AND SEMICONDUCTOR MEMORY [patent_app_type] => utility [patent_app_number] => 17/807135 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807135 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/807135
Control amplifying circuit, sense amplifier and semiconductor memory Jun 14, 2022 Issued
Array ( [id] => 19123373 [patent_doc_number] => 11967367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Nonvolatile memory device and storage device including nonvolatile memory device [patent_app_type] => utility [patent_app_number] => 17/806103 [patent_app_country] => US [patent_app_date] => 2022-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 14890 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806103 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/806103
Nonvolatile memory device and storage device including nonvolatile memory device Jun 8, 2022 Issued
Array ( [id] => 18833574 [patent_doc_number] => 20230402101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => TECHNIQUES FOR DETERMINING LAST PROGRAMMED WORDLINE [patent_app_type] => utility [patent_app_number] => 17/835396 [patent_app_country] => US [patent_app_date] => 2022-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13860 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17835396 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/835396
TECHNIQUES FOR DETERMINING LAST PROGRAMMED WORDLINE Jun 7, 2022 Abandoned
Array ( [id] => 18040839 [patent_doc_number] => 20220385056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => SYSTEMS AND METHODS FOR DETECTING AND IDENTIFYING ARCING BASED ON NUMERICAL ANALYSIS [patent_app_type] => utility [patent_app_number] => 17/831977 [patent_app_country] => US [patent_app_date] => 2022-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17831977 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/831977
Systems and methods for detecting and identifying arcing based on numerical analysis Jun 2, 2022 Issued
Array ( [id] => 17870441 [patent_doc_number] => 20220293178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => RESISTANCE CHANGE MEMORY CELL CIRCUITS AND METHODS [patent_app_type] => utility [patent_app_number] => 17/829571 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17829571 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/829571
Resistance change memory cell circuits and methods May 31, 2022 Issued
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