
Tan V. Mai
Examiner (ID: 15743)
| Most Active Art Unit | 2193 |
| Art Unit(s) | 2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183 |
| Total Applications | 3863 |
| Issued Applications | 3431 |
| Pending Applications | 94 |
| Abandoned Applications | 349 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1184338
[patent_doc_number] => 06748409
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-06-08
[patent_title] => 'Data interpolating system'
[patent_app_type] => B1
[patent_app_number] => 09/601007
[patent_app_country] => US
[patent_app_date] => 2000-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 3242
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/748/06748409.pdf
[firstpage_image] =>[orig_patent_app_number] => 09601007
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/601007 | Data interpolating system | Sep 7, 2000 | Issued |
Array
(
[id] => 7962385
[patent_doc_number] => 06681237
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-01-20
[patent_title] => 'Exponentiation circuit for graphics adapter'
[patent_app_type] => B1
[patent_app_number] => 09/656526
[patent_app_country] => US
[patent_app_date] => 2000-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 5113
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/681/06681237.pdf
[firstpage_image] =>[orig_patent_app_number] => 09656526
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/656526 | Exponentiation circuit for graphics adapter | Sep 6, 2000 | Issued |
Array
(
[id] => 1200760
[patent_doc_number] => 06728745
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-27
[patent_title] => 'Semiconductor circuit for arithmetic operation and method of arithmetic operation'
[patent_app_type] => B1
[patent_app_number] => 09/581729
[patent_app_country] => US
[patent_app_date] => 2000-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 17489
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/728/06728745.pdf
[firstpage_image] =>[orig_patent_app_number] => 09581729
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/581729 | Semiconductor circuit for arithmetic operation and method of arithmetic operation | Sep 5, 2000 | Issued |
Array
(
[id] => 7622446
[patent_doc_number] => 06687720
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-02-03
[patent_title] => 'Percentage and average calculator with expanded display'
[patent_app_type] => B1
[patent_app_number] => 09/654692
[patent_app_country] => US
[patent_app_date] => 2000-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 21
[patent_no_of_words] => 18497
[patent_no_of_claims] => 41
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/687/06687720.pdf
[firstpage_image] =>[orig_patent_app_number] => 09654692
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/654692 | Percentage and average calculator with expanded display | Sep 4, 2000 | Issued |
Array
(
[id] => 7623929
[patent_doc_number] => 06725248
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-20
[patent_title] => 'Decimation filter and signal processing method using the same'
[patent_app_type] => B1
[patent_app_number] => 09/654090
[patent_app_country] => US
[patent_app_date] => 2000-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 18
[patent_no_of_words] => 4552
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 5
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/725/06725248.pdf
[firstpage_image] =>[orig_patent_app_number] => 09654090
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/654090 | Decimation filter and signal processing method using the same | Aug 31, 2000 | Issued |
Array
(
[id] => 1184328
[patent_doc_number] => 06748404
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-06-08
[patent_title] => 'Data editable statistic calculator, and the related data editing method'
[patent_app_type] => B1
[patent_app_number] => 09/642790
[patent_app_country] => US
[patent_app_date] => 2000-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 1647
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/748/06748404.pdf
[firstpage_image] =>[orig_patent_app_number] => 09642790
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/642790 | Data editable statistic calculator, and the related data editing method | Aug 21, 2000 | Issued |
Array
(
[id] => 4424184
[patent_doc_number] => 06266688
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-24
[patent_title] => 'Scheme for arithmetic operations in finite field and group operations over elliptic curves realizing improved computational speed'
[patent_app_type] => 1
[patent_app_number] => 9/638322
[patent_app_country] => US
[patent_app_date] => 2000-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 15761
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/266/06266688.pdf
[firstpage_image] =>[orig_patent_app_number] => 638322
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/638322 | Scheme for arithmetic operations in finite field and group operations over elliptic curves realizing improved computational speed | Aug 13, 2000 | Issued |
Array
(
[id] => 4272771
[patent_doc_number] => 06209015
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-27
[patent_title] => 'Method of implementing dual-mode audio decorder and filter therefor'
[patent_app_type] => 1
[patent_app_number] => 9/634234
[patent_app_country] => US
[patent_app_date] => 2000-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 6298
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 286
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/209/06209015.pdf
[firstpage_image] =>[orig_patent_app_number] => 634234
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/634234 | Method of implementing dual-mode audio decorder and filter therefor | Aug 7, 2000 | Issued |
Array
(
[id] => 1365643
[patent_doc_number] => 06584486
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-06-24
[patent_title] => 'Method for mathematically processing two quantities in an electronic circuit'
[patent_app_type] => B1
[patent_app_number] => 09/628578
[patent_app_country] => US
[patent_app_date] => 2000-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 4580
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 339
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/584/06584486.pdf
[firstpage_image] =>[orig_patent_app_number] => 09628578
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/628578 | Method for mathematically processing two quantities in an electronic circuit | Jul 30, 2000 | Issued |
Array
(
[id] => 1112029
[patent_doc_number] => 06810407
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-10-26
[patent_title] => 'Optical boolean logic devices for data encryption'
[patent_app_type] => B1
[patent_app_number] => 09/616107
[patent_app_country] => US
[patent_app_date] => 2000-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 18
[patent_no_of_words] => 6774
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/810/06810407.pdf
[firstpage_image] =>[orig_patent_app_number] => 09616107
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/616107 | Optical boolean logic devices for data encryption | Jul 13, 2000 | Issued |
Array
(
[id] => 998887
[patent_doc_number] => 06915317
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-07-05
[patent_title] => 'Method of converting a linear value to an integer'
[patent_app_type] => utility
[patent_app_number] => 09/616815
[patent_app_country] => US
[patent_app_date] => 2000-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 19
[patent_no_of_words] => 4227
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/915/06915317.pdf
[firstpage_image] =>[orig_patent_app_number] => 09616815
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/616815 | Method of converting a linear value to an integer | Jul 12, 2000 | Issued |
Array
(
[id] => 1240729
[patent_doc_number] => 06691145
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-02-10
[patent_title] => 'Computing circuit, computing apparatus, and semiconductor computing circuit'
[patent_app_type] => B1
[patent_app_number] => 09/615754
[patent_app_country] => US
[patent_app_date] => 2000-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 8227
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/691/06691145.pdf
[firstpage_image] =>[orig_patent_app_number] => 09615754
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/615754 | Computing circuit, computing apparatus, and semiconductor computing circuit | Jul 12, 2000 | Issued |
Array
(
[id] => 7633175
[patent_doc_number] => 06658445
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-12-02
[patent_title] => 'Apparatus and method for demodulating a square root of the sum of two squares'
[patent_app_type] => B1
[patent_app_number] => 09/614116
[patent_app_country] => US
[patent_app_date] => 2000-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3305
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 29
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/658/06658445.pdf
[firstpage_image] =>[orig_patent_app_number] => 09614116
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/614116 | Apparatus and method for demodulating a square root of the sum of two squares | Jul 10, 2000 | Issued |
Array
(
[id] => 1088407
[patent_doc_number] => 06832232
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-12-14
[patent_title] => 'Dual-block inverse discrete cosine transform method'
[patent_app_type] => B1
[patent_app_number] => 09/613016
[patent_app_country] => US
[patent_app_date] => 2000-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 21
[patent_no_of_words] => 8336
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/832/06832232.pdf
[firstpage_image] =>[orig_patent_app_number] => 09613016
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/613016 | Dual-block inverse discrete cosine transform method | Jul 9, 2000 | Issued |
Array
(
[id] => 1186206
[patent_doc_number] => 06742010
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-05-25
[patent_title] => 'Dual-block discrete consine transform method'
[patent_app_type] => B1
[patent_app_number] => 09/613015
[patent_app_country] => US
[patent_app_date] => 2000-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 21
[patent_no_of_words] => 8309
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/742/06742010.pdf
[firstpage_image] =>[orig_patent_app_number] => 09613015
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/613015 | Dual-block discrete consine transform method | Jul 9, 2000 | Issued |
Array
(
[id] => 7613919
[patent_doc_number] => 06898612
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-05-24
[patent_title] => 'Method and system for on-line blind source separation'
[patent_app_type] => utility
[patent_app_number] => 09/597105
[patent_app_country] => US
[patent_app_date] => 2000-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 7079
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/898/06898612.pdf
[firstpage_image] =>[orig_patent_app_number] => 09597105
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/597105 | Method and system for on-line blind source separation | Jun 19, 2000 | Issued |
Array
(
[id] => 978419
[patent_doc_number] => 06934731
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-08-23
[patent_title] => 'Rational frequency synthesizers employing digital commutators'
[patent_app_type] => utility
[patent_app_number] => 09/579847
[patent_app_country] => US
[patent_app_date] => 2000-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 3772
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 24
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/934/06934731.pdf
[firstpage_image] =>[orig_patent_app_number] => 09579847
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/579847 | Rational frequency synthesizers employing digital commutators | May 24, 2000 | Issued |
Array
(
[id] => 4323974
[patent_doc_number] => 06327604
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-12-04
[patent_title] => 'System and method for floating-point computation'
[patent_app_type] => 1
[patent_app_number] => 9/576310
[patent_app_country] => US
[patent_app_date] => 2000-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 12937
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/327/06327604.pdf
[firstpage_image] =>[orig_patent_app_number] => 576310
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/576310 | System and method for floating-point computation | May 21, 2000 | Issued |
Array
(
[id] => 1438581
[patent_doc_number] => 06356927
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-03-12
[patent_title] => 'System and method for floating-point computation'
[patent_app_type] => B2
[patent_app_number] => 09/576311
[patent_app_country] => US
[patent_app_date] => 2000-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 12585
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/356/06356927.pdf
[firstpage_image] =>[orig_patent_app_number] => 09576311
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/576311 | System and method for floating-point computation | May 21, 2000 | Issued |
Array
(
[id] => 4278804
[patent_doc_number] => 06205460
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-20
[patent_title] => 'System and method for floating-computation for numbers in delimited floating point representation'
[patent_app_type] => 1
[patent_app_number] => 9/576312
[patent_app_country] => US
[patent_app_date] => 2000-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 24151
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/205/06205460.pdf
[firstpage_image] =>[orig_patent_app_number] => 576312
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/576312 | System and method for floating-computation for numbers in delimited floating point representation | May 21, 2000 | Issued |