Tan V. Mai

Array ( [id] => 1466571 [patent_doc_number] => 06351758 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-26 [patent_title] => 'Bit and digit reversal methods' [patent_app_type] => B1 [patent_app_number] => 09/244587 [patent_app_country] => US [patent_app_date] => 1999-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4033 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/351/06351758.pdf [firstpage_image] =>[orig_patent_app_number] => 09244587 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4399384 [patent_doc_number] => 06304890 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Exponential calculation device and decoding device' [patent_app_type] => 1 [patent_app_number] => 9/244155 [patent_app_country] => US [patent_app_date] => 1999-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 21318 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304890.pdf [firstpage_image] =>[orig_patent_app_number] => 244155 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1557071 [patent_doc_number] => 06349319 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-19 [patent_title] => 'Floating point square root and reciprocal square root computation unit in a processor' [patent_app_type] => B1 [patent_app_number] => 09/240765 [patent_app_country] => US [patent_app_date] => 1999-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7998 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/349/06349319.pdf [firstpage_image] =>[orig_patent_app_number] => 09240765 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1434010 [patent_doc_number] => 06341300 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-22 [patent_title] => 'Parallel fixed point square root and reciprocal square root computation unit in a processor' [patent_app_type] => B1 [patent_app_number] => 09/240977 [patent_app_country] => US [patent_app_date] => 1999-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 8730 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/341/06341300.pdf [firstpage_image] =>[orig_patent_app_number] => 09240977 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4291286 [patent_doc_number] => 06247037 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Optical correlator having multiple active components formed on a single integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/238311 [patent_app_country] => US [patent_app_date] => 1999-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 12087 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/247/06247037.pdf [firstpage_image] =>[orig_patent_app_number] => 238311 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4401380 [patent_doc_number] => 06279021 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Digital filters' [patent_app_type] => 1 [patent_app_number] => 9/237837 [patent_app_country] => US [patent_app_date] => 1999-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5935 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/279/06279021.pdf [firstpage_image] =>[orig_patent_app_number] => 237837 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4088017 [patent_doc_number] => 06070183 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Arithmetic unit, correlation arithmetic unit and dynamic image compression apparatus' [patent_app_type] => 1 [patent_app_number] => 9/236474 [patent_app_country] => US [patent_app_date] => 1999-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 84 [patent_figures_cnt] => 155 [patent_no_of_words] => 33822 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/070/06070183.pdf [firstpage_image] =>[orig_patent_app_number] => 236474 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1434005 [patent_doc_number] => 06341295 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-22 [patent_title] => 'Virtual reality integrated caloric tabulator' [patent_app_type] => B1 [patent_app_number] => 09/234555 [patent_app_country] => US [patent_app_date] => 1999-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2415 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/341/06341295.pdf [firstpage_image] =>[orig_patent_app_number] => 09234555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1430997 [patent_doc_number] => 06523055 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Circuit and method for multiplying and accumulating the sum of two products in a single cycle' [patent_app_type] => B1 [patent_app_number] => 09/235417 [patent_app_country] => US [patent_app_date] => 1999-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 8639 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/523/06523055.pdf [firstpage_image] =>[orig_patent_app_number] => 09235417 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1592020 [patent_doc_number] => 06360239 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Noise-shaped coefficient rounding for FIR filters' [patent_app_type] => B1 [patent_app_number] => 09/231324 [patent_app_country] => US [patent_app_date] => 1999-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2819 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/360/06360239.pdf [firstpage_image] =>[orig_patent_app_number] => 09231324 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4373215 [patent_doc_number] => 06292818 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Method and apparatus for performing a sum-and-compare operation' [patent_app_type] => 1 [patent_app_number] => 9/228666 [patent_app_country] => US [patent_app_date] => 1999-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4803 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/292/06292818.pdf [firstpage_image] =>[orig_patent_app_number] => 228666 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4256379 [patent_doc_number] => 06144978 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Method and device for the approximative computation of the exponential mean of a sequence of coded numbers in floating point format' [patent_app_type] => 1 [patent_app_number] => 9/147512 [patent_app_country] => US [patent_app_date] => 1999-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1695 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144978.pdf [firstpage_image] =>[orig_patent_app_number] => 147512 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4373192 [patent_doc_number] => 06292816 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Nonlinear equalizing apparatus' [patent_app_type] => 1 [patent_app_number] => 9/225505 [patent_app_country] => US [patent_app_date] => 1999-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7942 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/292/06292816.pdf [firstpage_image] =>[orig_patent_app_number] => 225505 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1420577 [patent_doc_number] => 06542918 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-01 [patent_title] => 'Prefix sums and an application thereof' [patent_app_type] => B1 [patent_app_number] => 09/224104 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4317 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/542/06542918.pdf [firstpage_image] =>[orig_patent_app_number] => 09224104 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4311490 [patent_doc_number] => 06237015 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Method for the production of a parameter J0 associated with the implementation of modular operations according to the Montgomery method' [patent_app_type] => 1 [patent_app_number] => 9/224445 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6547 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 396 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/237/06237015.pdf [firstpage_image] =>[orig_patent_app_number] => 224445 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4334186 [patent_doc_number] => 06243729 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Digital finite-impulse-response (FIR) filter with a modified architecture based on high order Radix-N numbering' [patent_app_type] => 1 [patent_app_number] => 9/224364 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3289 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243729.pdf [firstpage_image] =>[orig_patent_app_number] => 224364 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4348800 [patent_doc_number] => 06321247 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'System and method for multiplication modulo (2N+1)' [patent_app_type] => 1 [patent_app_number] => 9/222254 [patent_app_country] => US [patent_app_date] => 1998-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5186 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/321/06321247.pdf [firstpage_image] =>[orig_patent_app_number] => 222254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1567146 [patent_doc_number] => 06363405 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Computer system and method for parallel computations using table approximation methods' [patent_app_type] => B1 [patent_app_number] => 09/220506 [patent_app_country] => US [patent_app_date] => 1998-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1590 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363405.pdf [firstpage_image] =>[orig_patent_app_number] => 09220506 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4332592 [patent_doc_number] => 06317771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Method and apparatus for performing digital division' [patent_app_type] => 1 [patent_app_number] => 9/218974 [patent_app_country] => US [patent_app_date] => 1998-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5962 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/317/06317771.pdf [firstpage_image] =>[orig_patent_app_number] => 218974 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4351005 [patent_doc_number] => 06314442 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Floating-point arithmetic unit which specifies a least significant bit to be incremented' [patent_app_type] => 1 [patent_app_number] => 9/218076 [patent_app_country] => US [patent_app_date] => 1998-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 6863 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/314/06314442.pdf [firstpage_image] =>[orig_patent_app_number] => 218076 [rel_patent_id] =>[rel_patent_doc_number] =>)