Search

Tan V. Mai

Examiner (ID: 15743)

Most Active Art Unit
2193
Art Unit(s)
2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7638679 [patent_doc_number] => 06397241 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Multiplier cell and method of computing' [patent_app_type] => B1 [patent_app_number] => 09/215935 [patent_app_country] => US [patent_app_date] => 1998-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 12981 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/397/06397241.pdf [firstpage_image] =>[orig_patent_app_number] => 09215935 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/215935
Multiplier cell and method of computing Dec 17, 1998 Issued
Array ( [id] => 4348770 [patent_doc_number] => 06321245 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Method and system for performing fast division using non linear interpolation' [patent_app_type] => 1 [patent_app_number] => 9/213504 [patent_app_country] => US [patent_app_date] => 1998-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4375 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/321/06321245.pdf [firstpage_image] =>[orig_patent_app_number] => 213504 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/213504
Method and system for performing fast division using non linear interpolation Dec 16, 1998 Issued
Array ( [id] => 4378613 [patent_doc_number] => 06192386 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Digital filter, digital signal processing method, and communication apparatus' [patent_app_type] => 1 [patent_app_number] => 9/212586 [patent_app_country] => US [patent_app_date] => 1998-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 39 [patent_no_of_words] => 12890 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/192/06192386.pdf [firstpage_image] =>[orig_patent_app_number] => 212586 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/212586
Digital filter, digital signal processing method, and communication apparatus Dec 15, 1998 Issued
Array ( [id] => 4311448 [patent_doc_number] => 06237013 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Method and device for correlating detection, and communication terminal device' [patent_app_type] => 1 [patent_app_number] => 9/212905 [patent_app_country] => US [patent_app_date] => 1998-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 10249 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/237/06237013.pdf [firstpage_image] =>[orig_patent_app_number] => 212905 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/212905
Method and device for correlating detection, and communication terminal device Dec 15, 1998 Issued
Array ( [id] => 4401365 [patent_doc_number] => 06279020 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Programmable circuit for realizing a digital filter' [patent_app_type] => 1 [patent_app_number] => 9/212365 [patent_app_country] => US [patent_app_date] => 1998-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2893 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/279/06279020.pdf [firstpage_image] =>[orig_patent_app_number] => 212365 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/212365
Programmable circuit for realizing a digital filter Dec 14, 1998 Issued
Array ( [id] => 4289468 [patent_doc_number] => 06308190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Low-power pulse-shaping digital filters' [patent_app_type] => 1 [patent_app_number] => 9/211357 [patent_app_country] => US [patent_app_date] => 1998-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 14565 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/308/06308190.pdf [firstpage_image] =>[orig_patent_app_number] => 211357 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/211357
Low-power pulse-shaping digital filters Dec 14, 1998 Issued
Array ( [id] => 4350224 [patent_doc_number] => 06334136 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-25 [patent_title] => 'Dynamic 3-level partial result merge adder' [patent_app_type] => 1 [patent_app_number] => 9/209935 [patent_app_country] => US [patent_app_date] => 1998-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 34 [patent_no_of_words] => 25945 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/334/06334136.pdf [firstpage_image] =>[orig_patent_app_number] => 209935 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/209935
Dynamic 3-level partial result merge adder Dec 10, 1998 Issued
Array ( [id] => 1519421 [patent_doc_number] => 06421695 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Apparatus for implementing inverse discrete cosine transform in digital image processing system' [patent_app_type] => B1 [patent_app_number] => 09/208640 [patent_app_country] => US [patent_app_date] => 1998-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 7150 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/421/06421695.pdf [firstpage_image] =>[orig_patent_app_number] => 09208640 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/208640
Apparatus for implementing inverse discrete cosine transform in digital image processing system Dec 9, 1998 Issued
Array ( [id] => 4206115 [patent_doc_number] => 06131107 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Fast determination of carry inputs from lower order product for radis-8 odd/even multiplier array' [patent_app_type] => 1 [patent_app_number] => 9/208169 [patent_app_country] => US [patent_app_date] => 1998-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10820 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/131/06131107.pdf [firstpage_image] =>[orig_patent_app_number] => 208169 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/208169
Fast determination of carry inputs from lower order product for radis-8 odd/even multiplier array Dec 8, 1998 Issued
Array ( [id] => 4423806 [patent_doc_number] => 06301598 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Method and apparatus for estimating a square of a number' [patent_app_type] => 1 [patent_app_number] => 9/207704 [patent_app_country] => US [patent_app_date] => 1998-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5937 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/301/06301598.pdf [firstpage_image] =>[orig_patent_app_number] => 207704 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/207704
Method and apparatus for estimating a square of a number Dec 8, 1998 Issued
Array ( [id] => 4336316 [patent_doc_number] => 06249796 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Real-time technique for reducing the settling time of a high pass filter' [patent_app_type] => 1 [patent_app_number] => 9/207697 [patent_app_country] => US [patent_app_date] => 1998-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2833 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249796.pdf [firstpage_image] =>[orig_patent_app_number] => 207697 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/207697
Real-time technique for reducing the settling time of a high pass filter Dec 7, 1998 Issued
Array ( [id] => 4370250 [patent_doc_number] => 06216147 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Method and apparatus for an N-nary magnitude comparator' [patent_app_type] => 1 [patent_app_number] => 9/206906 [patent_app_country] => US [patent_app_date] => 1998-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 12361 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/216/06216147.pdf [firstpage_image] =>[orig_patent_app_number] => 206906 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/206906
Method and apparatus for an N-nary magnitude comparator Dec 6, 1998 Issued
Array ( [id] => 4372912 [patent_doc_number] => 06202075 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Second order LMS tap update algorithm with high tracking capability' [patent_app_type] => 1 [patent_app_number] => 9/206519 [patent_app_country] => US [patent_app_date] => 1998-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4474 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/202/06202075.pdf [firstpage_image] =>[orig_patent_app_number] => 206519 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/206519
Second order LMS tap update algorithm with high tracking capability Dec 6, 1998 Issued
Array ( [id] => 4348814 [patent_doc_number] => 06321248 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Process for determining an overflow to the format of the result of an arithmetic operation carried out on two operands' [patent_app_type] => 1 [patent_app_number] => 9/206000 [patent_app_country] => US [patent_app_date] => 1998-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4406 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/321/06321248.pdf [firstpage_image] =>[orig_patent_app_number] => 206000 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/206000
Process for determining an overflow to the format of the result of an arithmetic operation carried out on two operands Dec 3, 1998 Issued
Array ( [id] => 4267906 [patent_doc_number] => 06138131 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Arc-tangent circuit for continuous linear output' [patent_app_type] => 1 [patent_app_number] => 9/208400 [patent_app_country] => US [patent_app_date] => 1998-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2709 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/138/06138131.pdf [firstpage_image] =>[orig_patent_app_number] => 208400 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/208400
Arc-tangent circuit for continuous linear output Nov 26, 1998 Issued
Array ( [id] => 4100410 [patent_doc_number] => 06018754 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Apparatus for filtering a signal utilizing recursion and decimation' [patent_app_type] => 1 [patent_app_number] => 9/197688 [patent_app_country] => US [patent_app_date] => 1998-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 16134 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/018/06018754.pdf [firstpage_image] =>[orig_patent_app_number] => 197688 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/197688
Apparatus for filtering a signal utilizing recursion and decimation Nov 22, 1998 Issued
Array ( [id] => 4365290 [patent_doc_number] => 06286022 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-04 [patent_title] => 'Efficient finite field basis conversion involving a dual basis' [patent_app_type] => 1 [patent_app_number] => 9/195346 [patent_app_country] => US [patent_app_date] => 1998-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 14025 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/286/06286022.pdf [firstpage_image] =>[orig_patent_app_number] => 195346 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/195346
Efficient finite field basis conversion involving a dual basis Nov 17, 1998 Issued
Array ( [id] => 4100432 [patent_doc_number] => 06163789 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Digital parametric equalizer with symmetrical cut and boost spectrums' [patent_app_type] => 1 [patent_app_number] => 9/195295 [patent_app_country] => US [patent_app_date] => 1998-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3295 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163789.pdf [firstpage_image] =>[orig_patent_app_number] => 195295 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/195295
Digital parametric equalizer with symmetrical cut and boost spectrums Nov 17, 1998 Issued
Array ( [id] => 4427238 [patent_doc_number] => 06226661 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Generation and application of sample rate conversion ratios using distributed jitter' [patent_app_type] => 1 [patent_app_number] => 9/192045 [patent_app_country] => US [patent_app_date] => 1998-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4919 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/226/06226661.pdf [firstpage_image] =>[orig_patent_app_number] => 192045 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/192045
Generation and application of sample rate conversion ratios using distributed jitter Nov 12, 1998 Issued
Array ( [id] => 4401391 [patent_doc_number] => 06279022 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'System and method for detecting symbol boundary in multi-carrier transmission systems' [patent_app_type] => 1 [patent_app_number] => 9/191146 [patent_app_country] => US [patent_app_date] => 1998-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3643 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/279/06279022.pdf [firstpage_image] =>[orig_patent_app_number] => 191146 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/191146
System and method for detecting symbol boundary in multi-carrier transmission systems Nov 12, 1998 Issued
Menu