Search

Tan V. Mai

Examiner (ID: 15743)

Most Active Art Unit
2193
Art Unit(s)
2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3837457 [patent_doc_number] => 05784304 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Adaptively controlled filter' [patent_app_type] => 1 [patent_app_number] => 8/594172 [patent_app_country] => US [patent_app_date] => 1996-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 3477 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784304.pdf [firstpage_image] =>[orig_patent_app_number] => 594172 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/594172
Adaptively controlled filter Jan 30, 1996 Issued
Array ( [id] => 3703097 [patent_doc_number] => 05650954 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-22 [patent_title] => 'Frequency and time domain adaptive filtration in a sampled communication channel' [patent_app_type] => 1 [patent_app_number] => 8/593824 [patent_app_country] => US [patent_app_date] => 1996-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 30 [patent_no_of_words] => 15015 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/650/05650954.pdf [firstpage_image] =>[orig_patent_app_number] => 593824 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/593824
Frequency and time domain adaptive filtration in a sampled communication channel Jan 29, 1996 Issued
Array ( [id] => 3867474 [patent_doc_number] => 05706219 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'Interpolation device' [patent_app_type] => 1 [patent_app_number] => 8/594036 [patent_app_country] => US [patent_app_date] => 1996-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 28 [patent_no_of_words] => 6919 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/706/05706219.pdf [firstpage_image] =>[orig_patent_app_number] => 594036 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/594036
Interpolation device Jan 29, 1996 Issued
Array ( [id] => 4256223 [patent_doc_number] => 06081825 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Semiconductor device, semiconductor circuit using the device, and correlation calculation device, signal converter, and signal processing system using the circuit' [patent_app_type] => 1 [patent_app_number] => 8/592571 [patent_app_country] => US [patent_app_date] => 1996-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 7782 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081825.pdf [firstpage_image] =>[orig_patent_app_number] => 592571 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/592571
Semiconductor device, semiconductor circuit using the device, and correlation calculation device, signal converter, and signal processing system using the circuit Jan 25, 1996 Issued
Array ( [id] => 4067150 [patent_doc_number] => 05864495 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-26 [patent_title] => 'Arithmetic processing apparatus and arithmetic processing circuit' [patent_app_type] => 1 [patent_app_number] => 8/591343 [patent_app_country] => US [patent_app_date] => 1996-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3852 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/864/05864495.pdf [firstpage_image] =>[orig_patent_app_number] => 591343 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/591343
Arithmetic processing apparatus and arithmetic processing circuit Jan 24, 1996 Issued
Array ( [id] => 3915000 [patent_doc_number] => 05898602 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Carry chain circuit with flexible carry function for implementing arithmetic and logical functions' [patent_app_type] => 1 [patent_app_number] => 8/591841 [patent_app_country] => US [patent_app_date] => 1996-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2579 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898602.pdf [firstpage_image] =>[orig_patent_app_number] => 591841 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/591841
Carry chain circuit with flexible carry function for implementing arithmetic and logical functions Jan 24, 1996 Issued
Array ( [id] => 3889245 [patent_doc_number] => 05825681 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Divider/multiplier circuit having high precision mode' [patent_app_type] => 1 [patent_app_number] => 8/590656 [patent_app_country] => US [patent_app_date] => 1996-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4103 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/825/05825681.pdf [firstpage_image] =>[orig_patent_app_number] => 590656 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/590656
Divider/multiplier circuit having high precision mode Jan 23, 1996 Issued
Array ( [id] => 3853514 [patent_doc_number] => 05745395 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Signal processing apparatus and method' [patent_app_type] => 1 [patent_app_number] => 8/588397 [patent_app_country] => US [patent_app_date] => 1996-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3839 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745395.pdf [firstpage_image] =>[orig_patent_app_number] => 588397 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/588397
Signal processing apparatus and method Jan 17, 1996 Issued
Array ( [id] => 4401414 [patent_doc_number] => 06279024 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'High performance, low power incrementer for dynamic circuits' [patent_app_type] => 1 [patent_app_number] => 8/582716 [patent_app_country] => US [patent_app_date] => 1996-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2401 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/279/06279024.pdf [firstpage_image] =>[orig_patent_app_number] => 582716 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/582716
High performance, low power incrementer for dynamic circuits Jan 3, 1996 Issued
Array ( [id] => 3873115 [patent_doc_number] => 05796643 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Logical operator based digital filter' [patent_app_type] => 1 [patent_app_number] => 8/582002 [patent_app_country] => US [patent_app_date] => 1996-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4314 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796643.pdf [firstpage_image] =>[orig_patent_app_number] => 582002 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/582002
Logical operator based digital filter Jan 1, 1996 Issued
Array ( [id] => 3697073 [patent_doc_number] => 05696710 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-09 [patent_title] => 'Apparatus for symmetrically reducing N least significant bits of an M-bit digital signal' [patent_app_type] => 1 [patent_app_number] => 8/581115 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 6182 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/696/05696710.pdf [firstpage_image] =>[orig_patent_app_number] => 581115 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/581115
Apparatus for symmetrically reducing N least significant bits of an M-bit digital signal Dec 28, 1995 Issued
Array ( [id] => 3891847 [patent_doc_number] => 05805483 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Method of converting data outputting sequence in inverse DCT and circuit thereof' [patent_app_type] => 1 [patent_app_number] => 8/581225 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 59 [patent_no_of_words] => 6114 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/805/05805483.pdf [firstpage_image] =>[orig_patent_app_number] => 581225 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/581225
Method of converting data outputting sequence in inverse DCT and circuit thereof Dec 28, 1995 Issued
Array ( [id] => 3891821 [patent_doc_number] => 05805481 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Update block for an adaptive equalizer filter configuration capable of processing complex-valued coefficient signals' [patent_app_type] => 1 [patent_app_number] => 8/581635 [patent_app_country] => US [patent_app_date] => 1995-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 7666 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/805/05805481.pdf [firstpage_image] =>[orig_patent_app_number] => 581635 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/581635
Update block for an adaptive equalizer filter configuration capable of processing complex-valued coefficient signals Dec 27, 1995 Issued
Array ( [id] => 3944628 [patent_doc_number] => 05935201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Multiplier circuit for multiplication operation between binary and twos complement numbers' [patent_app_type] => 1 [patent_app_number] => 8/577305 [patent_app_country] => US [patent_app_date] => 1995-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4823 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/935/05935201.pdf [firstpage_image] =>[orig_patent_app_number] => 577305 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/577305
Multiplier circuit for multiplication operation between binary and twos complement numbers Dec 21, 1995 Issued
Array ( [id] => 3697086 [patent_doc_number] => 05696711 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-09 [patent_title] => 'Apparatus and method for performing variable precision floating point rounding operations' [patent_app_type] => 1 [patent_app_number] => 8/577726 [patent_app_country] => US [patent_app_date] => 1995-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2931 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/696/05696711.pdf [firstpage_image] =>[orig_patent_app_number] => 577726 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/577726
Apparatus and method for performing variable precision floating point rounding operations Dec 21, 1995 Issued
08/575605 METHOD OF SORTING SIGNED NUMBERS AND SOLVING ABSOLUTE DIFFERENCES USING PACKED INSTRUCTIONS Dec 19, 1995 Abandoned
Array ( [id] => 4126016 [patent_doc_number] => 06058408 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Method and apparatus for multiplying and accumulating complex numbers in a digital filter' [patent_app_type] => 1 [patent_app_number] => 8/575778 [patent_app_country] => US [patent_app_date] => 1995-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 14154 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/058/06058408.pdf [firstpage_image] =>[orig_patent_app_number] => 575778 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/575778
Method and apparatus for multiplying and accumulating complex numbers in a digital filter Dec 19, 1995 Issued
Array ( [id] => 3732951 [patent_doc_number] => 05673216 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-30 [patent_title] => 'Process and system for adding or subtracting symbols in any base without converting to a common base' [patent_app_type] => 1 [patent_app_number] => 8/575105 [patent_app_country] => US [patent_app_date] => 1995-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 11050 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/673/05673216.pdf [firstpage_image] =>[orig_patent_app_number] => 575105 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/575105
Process and system for adding or subtracting symbols in any base without converting to a common base Dec 18, 1995 Issued
Array ( [id] => 3898649 [patent_doc_number] => 05724278 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Apparatus for inverse discrete cosine transform' [patent_app_type] => 1 [patent_app_number] => 8/568096 [patent_app_country] => US [patent_app_date] => 1995-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6223 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/724/05724278.pdf [firstpage_image] =>[orig_patent_app_number] => 568096 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/568096
Apparatus for inverse discrete cosine transform Dec 5, 1995 Issued
Array ( [id] => 3889870 [patent_doc_number] => 05729478 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Notebook computer with insertable expansion devices' [patent_app_type] => 1 [patent_app_number] => 8/567105 [patent_app_country] => US [patent_app_date] => 1995-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1192 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729478.pdf [firstpage_image] =>[orig_patent_app_number] => 567105 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/567105
Notebook computer with insertable expansion devices Dec 3, 1995 Issued
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