Search

Tan V. Mai

Examiner (ID: 15743)

Most Active Art Unit
2193
Art Unit(s)
2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
08/497016 FAST DETERMINATION OF FLOATING POINT STICKY BIT FROM INPUT OPERANDS Jun 29, 1995 Abandoned
Array ( [id] => 3740801 [patent_doc_number] => 05666302 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Simultaneous bidirectional transmission apparatus for transmitting and receiving differential signals' [patent_app_type] => 1 [patent_app_number] => 8/496195 [patent_app_country] => US [patent_app_date] => 1995-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 6658 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 387 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666302.pdf [firstpage_image] =>[orig_patent_app_number] => 496195 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/496195
Simultaneous bidirectional transmission apparatus for transmitting and receiving differential signals Jun 27, 1995 Issued
Array ( [id] => 3712749 [patent_doc_number] => 05675528 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Early detection of overflow and exceptional quotient/remainder pairs for nonrestoring twos complement division' [patent_app_type] => 1 [patent_app_number] => 8/491176 [patent_app_country] => US [patent_app_date] => 1995-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 10758 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675528.pdf [firstpage_image] =>[orig_patent_app_number] => 491176 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/491176
Early detection of overflow and exceptional quotient/remainder pairs for nonrestoring twos complement division Jun 15, 1995 Issued
Array ( [id] => 3841179 [patent_doc_number] => 05712810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-27 [patent_title] => 'Analog multiplier and multiplier core circuit used therefor' [patent_app_type] => 1 [patent_app_number] => 8/489639 [patent_app_country] => US [patent_app_date] => 1995-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 31 [patent_no_of_words] => 11954 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/712/05712810.pdf [firstpage_image] =>[orig_patent_app_number] => 489639 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/489639
Analog multiplier and multiplier core circuit used therefor Jun 11, 1995 Issued
Array ( [id] => 3772229 [patent_doc_number] => 05742536 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Parallel calculation of exponent and sticky bit during normalization' [patent_app_type] => 1 [patent_app_number] => 8/478416 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742536.pdf [firstpage_image] =>[orig_patent_app_number] => 478416 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/478416
Parallel calculation of exponent and sticky bit during normalization Jun 6, 1995 Issued
Array ( [id] => 3703601 [patent_doc_number] => 05661674 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-26 [patent_title] => 'Divide to integer' [patent_app_type] => 1 [patent_app_number] => 8/472963 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3506 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/661/05661674.pdf [firstpage_image] =>[orig_patent_app_number] => 472963 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/472963
Divide to integer Jun 6, 1995 Issued
Array ( [id] => 3585038 [patent_doc_number] => 05523963 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-04 [patent_title] => 'Logic structure and circuit for fast carry' [patent_app_type] => 1 [patent_app_number] => 8/479896 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 8414 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/523/05523963.pdf [firstpage_image] =>[orig_patent_app_number] => 479896 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/479896
Logic structure and circuit for fast carry Jun 6, 1995 Issued
Array ( [id] => 3697502 [patent_doc_number] => 05644523 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'State-controlled half-parallel array Walsh Transform' [patent_app_type] => 1 [patent_app_number] => 8/477864 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4044 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644523.pdf [firstpage_image] =>[orig_patent_app_number] => 477864 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/477864
State-controlled half-parallel array Walsh Transform Jun 6, 1995 Issued
Array ( [id] => 3667807 [patent_doc_number] => 05627774 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-06 [patent_title] => 'Parallel calculation of exponent and sticky bit during normalization' [patent_app_type] => 1 [patent_app_number] => 8/473308 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10785 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/627/05627774.pdf [firstpage_image] =>[orig_patent_app_number] => 473308 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/473308
Parallel calculation of exponent and sticky bit during normalization Jun 6, 1995 Issued
Array ( [id] => 3678259 [patent_doc_number] => 05600583 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-04 [patent_title] => 'Circuit and method for detecting if a sum of two multidigit numbers equals a third multidigit number prior to availability of the sum' [patent_app_type] => 1 [patent_app_number] => 8/478145 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5298 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 452 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/600/05600583.pdf [firstpage_image] =>[orig_patent_app_number] => 478145 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/478145
Circuit and method for detecting if a sum of two multidigit numbers equals a third multidigit number prior to availability of the sum Jun 6, 1995 Issued
Array ( [id] => 3697407 [patent_doc_number] => 05644516 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Portable computer' [patent_app_type] => 1 [patent_app_number] => 8/485939 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 3467 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644516.pdf [firstpage_image] =>[orig_patent_app_number] => 485939 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/485939
Portable computer Jun 6, 1995 Issued
Array ( [id] => 3536151 [patent_doc_number] => 05528532 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-18 [patent_title] => 'Distortion circuits for improving distortion effects to audio data' [patent_app_type] => 1 [patent_app_number] => 8/469765 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3174 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/528/05528532.pdf [firstpage_image] =>[orig_patent_app_number] => 469765 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/469765
Distortion circuits for improving distortion effects to audio data Jun 5, 1995 Issued
Array ( [id] => 3612778 [patent_doc_number] => 05579254 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Fast static CMOS adder' [patent_app_type] => 1 [patent_app_number] => 8/471287 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 7403 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/579/05579254.pdf [firstpage_image] =>[orig_patent_app_number] => 471287 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/471287
Fast static CMOS adder Jun 5, 1995 Issued
Array ( [id] => 3623118 [patent_doc_number] => 05535147 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-09 [patent_title] => 'Method and apparatus for downloading information from a controllable light source to a portable information device' [patent_app_type] => 1 [patent_app_number] => 8/471868 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 6921 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/535/05535147.pdf [firstpage_image] =>[orig_patent_app_number] => 471868 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/471868
Method and apparatus for downloading information from a controllable light source to a portable information device Jun 4, 1995 Issued
Array ( [id] => 3691251 [patent_doc_number] => 05633820 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Self-resetting CMOS parallel adder with a bubble pipelined architecture, tri-rail merging logic, and enhanced testability' [patent_app_type] => 1 [patent_app_number] => 8/463146 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6681 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/633/05633820.pdf [firstpage_image] =>[orig_patent_app_number] => 463146 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/463146
Self-resetting CMOS parallel adder with a bubble pipelined architecture, tri-rail merging logic, and enhanced testability Jun 4, 1995 Issued
Array ( [id] => 3756522 [patent_doc_number] => 05717622 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Selecting circuit including circuits having different time constants to which each of a plurality of input signals is applied, and adding circuit using the same' [patent_app_type] => 1 [patent_app_number] => 8/463256 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5117 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717622.pdf [firstpage_image] =>[orig_patent_app_number] => 463256 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/463256
Selecting circuit including circuits having different time constants to which each of a plurality of input signals is applied, and adding circuit using the same Jun 4, 1995 Issued
Array ( [id] => 3772215 [patent_doc_number] => 05742535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Parallel calculation of exponent and sticky bit during normalization' [patent_app_type] => 1 [patent_app_number] => 8/461676 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10784 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742535.pdf [firstpage_image] =>[orig_patent_app_number] => 461676 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/461676
Parallel calculation of exponent and sticky bit during normalization Jun 4, 1995 Issued
Array ( [id] => 3733277 [patent_doc_number] => 05701260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-23 [patent_title] => 'Multiplier using charge transfer device' [patent_app_type] => 1 [patent_app_number] => 8/463779 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3747 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/701/05701260.pdf [firstpage_image] =>[orig_patent_app_number] => 463779 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/463779
Multiplier using charge transfer device Jun 4, 1995 Issued
Array ( [id] => 3706580 [patent_doc_number] => 05677861 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-14 [patent_title] => 'Arithmetic apparatus for floating-point numbers' [patent_app_type] => 1 [patent_app_number] => 8/463365 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7737 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/677/05677861.pdf [firstpage_image] =>[orig_patent_app_number] => 463365 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/463365
Arithmetic apparatus for floating-point numbers Jun 4, 1995 Issued
Array ( [id] => 3703050 [patent_doc_number] => 05650951 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-22 [patent_title] => 'Programmable data acquisition system with a microprocessor for correcting magnitude and phase of quantized signals while providing a substantially linear phase response' [patent_app_type] => 1 [patent_app_number] => 8/459852 [patent_app_country] => US [patent_app_date] => 1995-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5823 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/650/05650951.pdf [firstpage_image] =>[orig_patent_app_number] => 459852 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/459852
Programmable data acquisition system with a microprocessor for correcting magnitude and phase of quantized signals while providing a substantially linear phase response Jun 1, 1995 Issued
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