Search

Tan V. Mai

Examiner (ID: 15743)

Most Active Art Unit
2193
Art Unit(s)
2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3704069 [patent_doc_number] => 05680340 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-21 [patent_title] => 'Low order first bit serial finite field multiplier' [patent_app_type] => 1 [patent_app_number] => 8/415475 [patent_app_country] => US [patent_app_date] => 1995-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 133 [patent_figures_cnt] => 139 [patent_no_of_words] => 22851 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/680/05680340.pdf [firstpage_image] =>[orig_patent_app_number] => 415475 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/415475
Low order first bit serial finite field multiplier Mar 30, 1995 Issued
Array ( [id] => 3822382 [patent_doc_number] => 05710730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Divide to integer' [patent_app_type] => 1 [patent_app_number] => 8/414255 [patent_app_country] => US [patent_app_date] => 1995-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3522 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710730.pdf [firstpage_image] =>[orig_patent_app_number] => 414255 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/414255
Divide to integer Mar 30, 1995 Issued
Array ( [id] => 3697059 [patent_doc_number] => 05696709 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-09 [patent_title] => 'Program controlled rounding modes' [patent_app_type] => 1 [patent_app_number] => 8/414866 [patent_app_country] => US [patent_app_date] => 1995-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2026 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/696/05696709.pdf [firstpage_image] =>[orig_patent_app_number] => 414866 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/414866
Program controlled rounding modes Mar 30, 1995 Issued
Array ( [id] => 3789785 [patent_doc_number] => 05757682 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Parallel calculation of exponent and sticky bit during normalization' [patent_app_type] => 1 [patent_app_number] => 8/414072 [patent_app_country] => US [patent_app_date] => 1995-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10126 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/757/05757682.pdf [firstpage_image] =>[orig_patent_app_number] => 414072 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/414072
Parallel calculation of exponent and sticky bit during normalization Mar 30, 1995 Issued
Array ( [id] => 3697045 [patent_doc_number] => 05696708 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-09 [patent_title] => 'Digital filter with decimated frequency response' [patent_app_type] => 1 [patent_app_number] => 8/413356 [patent_app_country] => US [patent_app_date] => 1995-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3960 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/696/05696708.pdf [firstpage_image] =>[orig_patent_app_number] => 413356 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/413356
Digital filter with decimated frequency response Mar 29, 1995 Issued
Array ( [id] => 3756481 [patent_doc_number] => 05717621 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Speedup for solution of systems of linear equations' [patent_app_type] => 1 [patent_app_number] => 8/411918 [patent_app_country] => US [patent_app_date] => 1995-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3961 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717621.pdf [firstpage_image] =>[orig_patent_app_number] => 411918 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/411918
Speedup for solution of systems of linear equations Mar 27, 1995 Issued
Array ( [id] => 3656930 [patent_doc_number] => 05629881 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Method for filtering a digital value train with improved noise behavior, and circuit configuration for performing the method' [patent_app_type] => 1 [patent_app_number] => 8/404366 [patent_app_country] => US [patent_app_date] => 1995-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2342 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/629/05629881.pdf [firstpage_image] =>[orig_patent_app_number] => 404366 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/404366
Method for filtering a digital value train with improved noise behavior, and circuit configuration for performing the method Mar 14, 1995 Issued
Array ( [id] => 3617747 [patent_doc_number] => 05590067 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-31 [patent_title] => 'Method and arrangement for transformation of signals from a frequency to a time domain' [patent_app_type] => 1 [patent_app_number] => 8/404067 [patent_app_country] => US [patent_app_date] => 1995-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 15242 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/590/05590067.pdf [firstpage_image] =>[orig_patent_app_number] => 404067 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/404067
Method and arrangement for transformation of signals from a frequency to a time domain Mar 13, 1995 Issued
Array ( [id] => 3500769 [patent_doc_number] => 05561617 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-01 [patent_title] => 'Pyramid processor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/402402 [patent_app_country] => US [patent_app_date] => 1995-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 12889 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/561/05561617.pdf [firstpage_image] =>[orig_patent_app_number] => 402402 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/402402
Pyramid processor integrated circuit Mar 9, 1995 Issued
Array ( [id] => 3901816 [patent_doc_number] => RE036388 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Sine/cosine generator and method' [patent_app_type] => 2 [patent_app_number] => 8/400811 [patent_app_country] => US [patent_app_date] => 1995-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 9539 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 21 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/036/RE036388.pdf [firstpage_image] =>[orig_patent_app_number] => 400811 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/400811
Sine/cosine generator and method Mar 7, 1995 Issued
Array ( [id] => 3632783 [patent_doc_number] => 05594678 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Method and arrangement for transformation of signals from a frequency to a time domain' [patent_app_type] => 1 [patent_app_number] => 8/400723 [patent_app_country] => US [patent_app_date] => 1995-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 15296 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/594/05594678.pdf [firstpage_image] =>[orig_patent_app_number] => 400723 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/400723
Method and arrangement for transformation of signals from a frequency to a time domain Mar 6, 1995 Issued
Array ( [id] => 3704372 [patent_doc_number] => 05596517 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-21 [patent_title] => 'Method and arrangement for transformation of signals from a frequency to a time domain' [patent_app_type] => 1 [patent_app_number] => 8/400722 [patent_app_country] => US [patent_app_date] => 1995-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 15187 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/596/05596517.pdf [firstpage_image] =>[orig_patent_app_number] => 400722 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/400722
Method and arrangement for transformation of signals from a frequency to a time domain Mar 6, 1995 Issued
Array ( [id] => 3562991 [patent_doc_number] => 05574678 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-12 [patent_title] => 'Continuous time programmable analog block architecture' [patent_app_type] => 1 [patent_app_number] => 8/396994 [patent_app_country] => US [patent_app_date] => 1995-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3615 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/574/05574678.pdf [firstpage_image] =>[orig_patent_app_number] => 396994 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/396994
Continuous time programmable analog block architecture Feb 28, 1995 Issued
Array ( [id] => 4010407 [patent_doc_number] => 05923579 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Optimized binary adder and comparator having an implicit constant for an input' [patent_app_type] => 1 [patent_app_number] => 8/393619 [patent_app_country] => US [patent_app_date] => 1995-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 14050 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923579.pdf [firstpage_image] =>[orig_patent_app_number] => 393619 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/393619
Optimized binary adder and comparator having an implicit constant for an input Feb 21, 1995 Issued
Array ( [id] => 3596424 [patent_doc_number] => 05553011 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'Waveform generating apparatus for musical instrument' [patent_app_type] => 1 [patent_app_number] => 8/391466 [patent_app_country] => US [patent_app_date] => 1995-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 32 [patent_no_of_words] => 13422 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/553/05553011.pdf [firstpage_image] =>[orig_patent_app_number] => 391466 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/391466
Waveform generating apparatus for musical instrument Feb 20, 1995 Issued
Array ( [id] => 3515345 [patent_doc_number] => 05515306 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-07 [patent_title] => 'Processing system and method for minimum/maximum number determination' [patent_app_type] => 1 [patent_app_number] => 8/388324 [patent_app_country] => US [patent_app_date] => 1995-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3268 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/515/05515306.pdf [firstpage_image] =>[orig_patent_app_number] => 388324 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/388324
Processing system and method for minimum/maximum number determination Feb 13, 1995 Issued
08/389064 DIGITAL SIGNAL PROCESSING Feb 13, 1995 Abandoned
Array ( [id] => 3623163 [patent_doc_number] => 05535150 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-09 [patent_title] => 'Single chip adaptive filter utilizing updatable weighting techniques' [patent_app_type] => 1 [patent_app_number] => 8/388170 [patent_app_country] => US [patent_app_date] => 1995-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3608 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/535/05535150.pdf [firstpage_image] =>[orig_patent_app_number] => 388170 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/388170
Single chip adaptive filter utilizing updatable weighting techniques Feb 9, 1995 Issued
08/386254 LOGIC STRUCTURE AND CIRCUIT FOR FAST CARRY Feb 8, 1995 Abandoned
Array ( [id] => 3783616 [patent_doc_number] => 05774383 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Portable computer for one-handed operation' [patent_app_type] => 1 [patent_app_number] => 8/384903 [patent_app_country] => US [patent_app_date] => 1995-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2821 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/774/05774383.pdf [firstpage_image] =>[orig_patent_app_number] => 384903 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/384903
Portable computer for one-handed operation Feb 6, 1995 Issued
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