Search

Tan V. Mai

Examiner (ID: 15743)

Most Active Art Unit
2193
Art Unit(s)
2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3432600 [patent_doc_number] => 05459683 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-17 [patent_title] => 'Apparatus for calculating the square root of the sum of two squares' [patent_app_type] => 1 [patent_app_number] => 8/277826 [patent_app_country] => US [patent_app_date] => 1994-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 8260 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/459/05459683.pdf [firstpage_image] =>[orig_patent_app_number] => 277826 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/277826
Apparatus for calculating the square root of the sum of two squares Jul 19, 1994 Issued
Array ( [id] => 3432549 [patent_doc_number] => 05459679 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-17 [patent_title] => 'Real-time DC offset control and associated method' [patent_app_type] => 1 [patent_app_number] => 8/276817 [patent_app_country] => US [patent_app_date] => 1994-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6571 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/459/05459679.pdf [firstpage_image] =>[orig_patent_app_number] => 276817 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/276817
Real-time DC offset control and associated method Jul 17, 1994 Issued
Array ( [id] => 3565684 [patent_doc_number] => 05544083 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-06 [patent_title] => 'Password management method and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/274374 [patent_app_country] => US [patent_app_date] => 1994-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 6587 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/544/05544083.pdf [firstpage_image] =>[orig_patent_app_number] => 274374 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/274374
Password management method and apparatus Jul 12, 1994 Issued
Array ( [id] => 3623956 [patent_doc_number] => 05511013 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-23 [patent_title] => 'Low power consumption type one-chip microcomputer having a plurality of peripheral circuits' [patent_app_type] => 1 [patent_app_number] => 8/274004 [patent_app_country] => US [patent_app_date] => 1994-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3984 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/511/05511013.pdf [firstpage_image] =>[orig_patent_app_number] => 274004 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/274004
Low power consumption type one-chip microcomputer having a plurality of peripheral circuits Jul 11, 1994 Issued
Array ( [id] => 3666630 [patent_doc_number] => 05659495 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'Numeric processor including a multiply-add circuit for computing a succession of product sums using redundant values without conversion to nonredundant format' [patent_app_type] => 1 [patent_app_number] => 8/273585 [patent_app_country] => US [patent_app_date] => 1994-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 10928 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659495.pdf [firstpage_image] =>[orig_patent_app_number] => 273585 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/273585
Numeric processor including a multiply-add circuit for computing a succession of product sums using redundant values without conversion to nonredundant format Jul 10, 1994 Issued
Array ( [id] => 3598385 [patent_doc_number] => 05517433 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-14 [patent_title] => 'Parallel digital data communications' [patent_app_type] => 1 [patent_app_number] => 8/271172 [patent_app_country] => US [patent_app_date] => 1994-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4602 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/517/05517433.pdf [firstpage_image] =>[orig_patent_app_number] => 271172 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/271172
Parallel digital data communications Jul 6, 1994 Issued
Array ( [id] => 3738344 [patent_doc_number] => 05671170 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-23 [patent_title] => 'Method and apparatus for correctly rounding results of division and square root computations' [patent_app_type] => 1 [patent_app_number] => 8/270203 [patent_app_country] => US [patent_app_date] => 1994-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8569 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/671/05671170.pdf [firstpage_image] =>[orig_patent_app_number] => 270203 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/270203
Method and apparatus for correctly rounding results of division and square root computations Jun 30, 1994 Issued
Array ( [id] => 3482195 [patent_doc_number] => 05477477 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-19 [patent_title] => 'Data shifting circuit by utilizing MOS barrel shifter' [patent_app_type] => 1 [patent_app_number] => 8/265874 [patent_app_country] => US [patent_app_date] => 1994-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5854 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 352 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/477/05477477.pdf [firstpage_image] =>[orig_patent_app_number] => 265874 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/265874
Data shifting circuit by utilizing MOS barrel shifter Jun 26, 1994 Issued
Array ( [id] => 3559277 [patent_doc_number] => 05548540 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-20 [patent_title] => 'Decimation filter having a selectable decimation ratio' [patent_app_type] => 1 [patent_app_number] => 8/265475 [patent_app_country] => US [patent_app_date] => 1994-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7105 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/548/05548540.pdf [firstpage_image] =>[orig_patent_app_number] => 265475 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/265475
Decimation filter having a selectable decimation ratio Jun 23, 1994 Issued
Array ( [id] => 3437949 [patent_doc_number] => 05463569 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-31 [patent_title] => 'Decimation filter using a zero-fill circuit for providing a selectable decimation ratio' [patent_app_type] => 1 [patent_app_number] => 8/265343 [patent_app_country] => US [patent_app_date] => 1994-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8132 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/463/05463569.pdf [firstpage_image] =>[orig_patent_app_number] => 265343 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/265343
Decimation filter using a zero-fill circuit for providing a selectable decimation ratio Jun 23, 1994 Issued
Array ( [id] => 3527006 [patent_doc_number] => 05506799 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-09 [patent_title] => 'Booth array multiplying circuit having carry correction' [patent_app_type] => 1 [patent_app_number] => 8/266085 [patent_app_country] => US [patent_app_date] => 1994-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 29 [patent_no_of_words] => 11912 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/506/05506799.pdf [firstpage_image] =>[orig_patent_app_number] => 266085 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/266085
Booth array multiplying circuit having carry correction Jun 23, 1994 Issued
Array ( [id] => 3598445 [patent_doc_number] => 05517437 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-14 [patent_title] => 'Alpha blending calculator' [patent_app_type] => 1 [patent_app_number] => 8/263814 [patent_app_country] => US [patent_app_date] => 1994-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6396 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/517/05517437.pdf [firstpage_image] =>[orig_patent_app_number] => 263814 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/263814
Alpha blending calculator Jun 21, 1994 Issued
08/263795 DYNAMIC FILTER Jun 21, 1994 Abandoned
Array ( [id] => 3516388 [patent_doc_number] => 05570309 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-29 [patent_title] => 'Iterative arithmetic processor' [patent_app_type] => 1 [patent_app_number] => 8/262866 [patent_app_country] => US [patent_app_date] => 1994-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11838 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/570/05570309.pdf [firstpage_image] =>[orig_patent_app_number] => 262866 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/262866
Iterative arithmetic processor Jun 20, 1994 Issued
Array ( [id] => 3704964 [patent_doc_number] => 05619444 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Apparatus for performing analog multiplication and addition' [patent_app_type] => 1 [patent_app_number] => 8/263648 [patent_app_country] => US [patent_app_date] => 1994-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4169 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619444.pdf [firstpage_image] =>[orig_patent_app_number] => 263648 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/263648
Apparatus for performing analog multiplication and addition Jun 19, 1994 Issued
Array ( [id] => 3622378 [patent_doc_number] => 05566102 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-15 [patent_title] => 'Arithmetic element coupling network' [patent_app_type] => 1 [patent_app_number] => 8/260384 [patent_app_country] => US [patent_app_date] => 1994-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 9330 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/566/05566102.pdf [firstpage_image] =>[orig_patent_app_number] => 260384 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/260384
Arithmetic element coupling network Jun 13, 1994 Issued
Array ( [id] => 3424853 [patent_doc_number] => 05453946 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-26 [patent_title] => 'DCT peripheral for a digital signal processor' [patent_app_type] => 1 [patent_app_number] => 8/258804 [patent_app_country] => US [patent_app_date] => 1994-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 14227 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/453/05453946.pdf [firstpage_image] =>[orig_patent_app_number] => 258804 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/258804
DCT peripheral for a digital signal processor Jun 9, 1994 Issued
Array ( [id] => 3467231 [patent_doc_number] => 05473557 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-05 [patent_title] => 'Complex arithmetic processor and method' [patent_app_type] => 1 [patent_app_number] => 8/257314 [patent_app_country] => US [patent_app_date] => 1994-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3688 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/473/05473557.pdf [firstpage_image] =>[orig_patent_app_number] => 257314 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/257314
Complex arithmetic processor and method Jun 8, 1994 Issued
Array ( [id] => 3459133 [patent_doc_number] => 05424970 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-13 [patent_title] => 'Method and apparatus for multiplying a plurality of N numbers' [patent_app_type] => 1 [patent_app_number] => 8/257197 [patent_app_country] => US [patent_app_date] => 1994-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 17864 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 774 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/424/05424970.pdf [firstpage_image] =>[orig_patent_app_number] => 257197 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/257197
Method and apparatus for multiplying a plurality of N numbers Jun 8, 1994 Issued
Array ( [id] => 3574092 [patent_doc_number] => 05483473 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-09 [patent_title] => 'Waveform generator and method which obtains a wave-form using a calculator' [patent_app_type] => 1 [patent_app_number] => 8/257425 [patent_app_country] => US [patent_app_date] => 1994-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 28 [patent_no_of_words] => 3615 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/483/05483473.pdf [firstpage_image] =>[orig_patent_app_number] => 257425 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/257425
Waveform generator and method which obtains a wave-form using a calculator Jun 7, 1994 Issued
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