| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3678247
[patent_doc_number] => 05600582
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-04
[patent_title] => 'Programmable horizontal line filter implemented with synchronous vector processor'
[patent_app_type] => 1
[patent_app_number] => 8/222775
[patent_app_country] => US
[patent_app_date] => 1994-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 24
[patent_no_of_words] => 11106
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 438
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/600/05600582.pdf
[firstpage_image] =>[orig_patent_app_number] => 222775
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/222775 | Programmable horizontal line filter implemented with synchronous vector processor | Apr 4, 1994 | Issued |
Array
(
[id] => 3125489
[patent_doc_number] => 05410498
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-25
[patent_title] => 'Decimation circuit and method for filtering quantized signals while providing a substantially uniform magnitude and a substantially linear phase response'
[patent_app_type] => 1
[patent_app_number] => 8/223196
[patent_app_country] => US
[patent_app_date] => 1994-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 2990
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/410/05410498.pdf
[firstpage_image] =>[orig_patent_app_number] => 223196
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/223196 | Decimation circuit and method for filtering quantized signals while providing a substantially uniform magnitude and a substantially linear phase response | Apr 4, 1994 | Issued |
Array
(
[id] => 3113958
[patent_doc_number] => 05448506
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-05
[patent_title] => 'Multiplication operational circuit device'
[patent_app_type] => 1
[patent_app_number] => 8/221449
[patent_app_country] => US
[patent_app_date] => 1994-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1328
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/448/05448506.pdf
[firstpage_image] =>[orig_patent_app_number] => 221449
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/221449 | Multiplication operational circuit device | Mar 31, 1994 | Issued |
Array
(
[id] => 3482245
[patent_doc_number] => 05477481
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-19
[patent_title] => 'Switched-capacitor integrator with chopper stabilization performed at the sampling rate'
[patent_app_type] => 1
[patent_app_number] => 8/221985
[patent_app_country] => US
[patent_app_date] => 1994-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 21
[patent_no_of_words] => 5260
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/477/05477481.pdf
[firstpage_image] =>[orig_patent_app_number] => 221985
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/221985 | Switched-capacitor integrator with chopper stabilization performed at the sampling rate | Mar 31, 1994 | Issued |
| 08/221070 | HIGH PERFORMANCE ANALOG FINITE IMPULSE RESPONSE FILTER | Mar 30, 1994 | Abandoned |
Array
(
[id] => 3125507
[patent_doc_number] => 05410499
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-25
[patent_title] => 'Phase shifter for directly sampled bandpass signals'
[patent_app_type] => 1
[patent_app_number] => 8/220718
[patent_app_country] => US
[patent_app_date] => 1994-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2984
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 249
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/410/05410499.pdf
[firstpage_image] =>[orig_patent_app_number] => 220718
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/220718 | Phase shifter for directly sampled bandpass signals | Mar 30, 1994 | Issued |
Array
(
[id] => 3492424
[patent_doc_number] => 05446683
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-29
[patent_title] => 'Methods and apparatus for generating pseudo-random binary patterns'
[patent_app_type] => 1
[patent_app_number] => 8/221354
[patent_app_country] => US
[patent_app_date] => 1994-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6240
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/446/05446683.pdf
[firstpage_image] =>[orig_patent_app_number] => 221354
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/221354 | Methods and apparatus for generating pseudo-random binary patterns | Mar 30, 1994 | Issued |
Array
(
[id] => 3468347
[patent_doc_number] => 05383143
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-17
[patent_title] => 'Self re-seeding linear feedback shift register (LFSR) data processing system for generating a pseudo-random test bit stream and method of operation'
[patent_app_type] => 1
[patent_app_number] => 8/220348
[patent_app_country] => US
[patent_app_date] => 1994-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 11445
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/383/05383143.pdf
[firstpage_image] =>[orig_patent_app_number] => 220348
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/220348 | Self re-seeding linear feedback shift register (LFSR) data processing system for generating a pseudo-random test bit stream and method of operation | Mar 29, 1994 | Issued |
| 08/218194 | PYRAMID PROCESSOR INTEGRATED CIRCUIT | Mar 27, 1994 | Abandoned |
Array
(
[id] => 3566735
[patent_doc_number] => 05502664
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-26
[patent_title] => 'Filter device including SRAM and EEPROM devices'
[patent_app_type] => 1
[patent_app_number] => 8/216826
[patent_app_country] => US
[patent_app_date] => 1994-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 1423
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/502/05502664.pdf
[firstpage_image] =>[orig_patent_app_number] => 216826
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/216826 | Filter device including SRAM and EEPROM devices | Mar 22, 1994 | Issued |
Array
(
[id] => 3562947
[patent_doc_number] => 05574675
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-12
[patent_title] => 'State-controlled half-parallel array walsh transform'
[patent_app_type] => 1
[patent_app_number] => 8/215857
[patent_app_country] => US
[patent_app_date] => 1994-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4053
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/574/05574675.pdf
[firstpage_image] =>[orig_patent_app_number] => 215857
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/215857 | State-controlled half-parallel array walsh transform | Mar 21, 1994 | Issued |
Array
(
[id] => 3601172
[patent_doc_number] => 05568414
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-22
[patent_title] => 'Nonlinear operation unit and data processing apparatus using the nonlinear operation unit'
[patent_app_type] => 1
[patent_app_number] => 8/216017
[patent_app_country] => US
[patent_app_date] => 1994-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 29
[patent_no_of_words] => 11499
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 21
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/568/05568414.pdf
[firstpage_image] =>[orig_patent_app_number] => 216017
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/216017 | Nonlinear operation unit and data processing apparatus using the nonlinear operation unit | Mar 20, 1994 | Issued |
Array
(
[id] => 3576820
[patent_doc_number] => 05485414
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-16
[patent_title] => 'Divider circuit which calculates an integral quotient of an integral divisor'
[patent_app_type] => 1
[patent_app_number] => 8/214315
[patent_app_country] => US
[patent_app_date] => 1994-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5423
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/485/05485414.pdf
[firstpage_image] =>[orig_patent_app_number] => 214315
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/214315 | Divider circuit which calculates an integral quotient of an integral divisor | Mar 16, 1994 | Issued |
Array
(
[id] => 3421968
[patent_doc_number] => 05444647
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-22
[patent_title] => 'Multiplier circuit and division circuit with a round-off function'
[patent_app_type] => 1
[patent_app_number] => 8/212926
[patent_app_country] => US
[patent_app_date] => 1994-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 24
[patent_no_of_words] => 13296
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/444/05444647.pdf
[firstpage_image] =>[orig_patent_app_number] => 212926
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/212926 | Multiplier circuit and division circuit with a round-off function | Mar 14, 1994 | Issued |
| 08/213317 | LOGIC STRUCTURE AND CIRCUIT FOR FAST CARRY | Mar 13, 1994 | Abandoned |
Array
(
[id] => 3418958
[patent_doc_number] => 05461583
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-24
[patent_title] => 'Programmable frequency sine wave signal generator'
[patent_app_type] => 1
[patent_app_number] => 8/212222
[patent_app_country] => US
[patent_app_date] => 1994-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3290
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/461/05461583.pdf
[firstpage_image] =>[orig_patent_app_number] => 212222
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/212222 | Programmable frequency sine wave signal generator | Mar 13, 1994 | Issued |
Array
(
[id] => 3425310
[patent_doc_number] => 05394351
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-02-28
[patent_title] => 'Optimized binary adder and comparator having an implicit constant for an input'
[patent_app_type] => 1
[patent_app_number] => 8/212516
[patent_app_country] => US
[patent_app_date] => 1994-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 14179
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/394/05394351.pdf
[firstpage_image] =>[orig_patent_app_number] => 212516
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/212516 | Optimized binary adder and comparator having an implicit constant for an input | Mar 10, 1994 | Issued |
Array
(
[id] => 3116811
[patent_doc_number] => 05418736
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-23
[patent_title] => 'Optimized binary adders and comparators for inputs having different widths'
[patent_app_type] => 1
[patent_app_number] => 8/212514
[patent_app_country] => US
[patent_app_date] => 1994-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 19
[patent_no_of_words] => 14517
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/418/05418736.pdf
[firstpage_image] =>[orig_patent_app_number] => 212514
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/212514 | Optimized binary adders and comparators for inputs having different widths | Mar 10, 1994 | Issued |
Array
(
[id] => 3562348
[patent_doc_number] => 05493521
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-20
[patent_title] => 'Vector calculation apparatus capable of rapidly carrying out vector calculation of two input vectors'
[patent_app_type] => 1
[patent_app_number] => 8/208081
[patent_app_country] => US
[patent_app_date] => 1994-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5019
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 797
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/493/05493521.pdf
[firstpage_image] =>[orig_patent_app_number] => 208081
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/208081 | Vector calculation apparatus capable of rapidly carrying out vector calculation of two input vectors | Mar 8, 1994 | Issued |
Array
(
[id] => 3452097
[patent_doc_number] => 05467294
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-14
[patent_title] => 'High speed, low power direct digital synthesizer'
[patent_app_type] => 1
[patent_app_number] => 8/207705
[patent_app_country] => US
[patent_app_date] => 1994-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5427
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 419
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/467/05467294.pdf
[firstpage_image] =>[orig_patent_app_number] => 207705
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/207705 | High speed, low power direct digital synthesizer | Mar 8, 1994 | Issued |