Search

Tan V Mai

Examiner (ID: 13419, Phone: (571)272-3726 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2183, 2121, 2182, 2193, 2301, 2306, 2124, 2786, 2302
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15544941 [patent_doc_number] => 10572251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Method and apparatus for performing logical compare operations [patent_app_type] => utility [patent_app_number] => 16/184994 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 14559 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16184994 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/184994
Method and apparatus for performing logical compare operations Nov 7, 2018 Issued
Array ( [id] => 17238787 [patent_doc_number] => 11182668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-23 [patent_title] => Neural network architecture using convolution engine filter weight buffers [patent_app_type] => utility [patent_app_number] => 16/182471 [patent_app_country] => US [patent_app_date] => 2018-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 17698 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16182471 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/182471
Neural network architecture using convolution engine filter weight buffers Nov 5, 2018 Issued
Array ( [id] => 17515832 [patent_doc_number] => 11294985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Efficient analog in-memory matrix multiplication processor [patent_app_type] => utility [patent_app_number] => 16/175229 [patent_app_country] => US [patent_app_date] => 2018-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9251 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16175229 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/175229
Efficient analog in-memory matrix multiplication processor Oct 29, 2018 Issued
Array ( [id] => 16171488 [patent_doc_number] => 10713055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Parallelization of numeric optimizers [patent_app_type] => utility [patent_app_number] => 16/173356 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6967 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16173356 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/173356
Parallelization of numeric optimizers Oct 28, 2018 Issued
Array ( [id] => 16535459 [patent_doc_number] => 10878060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Methods and apparatus for job scheduling in a programmable mixed-radix DFT/IDFT processor [patent_app_type] => utility [patent_app_number] => 16/173877 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 12572 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16173877 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/173877
Methods and apparatus for job scheduling in a programmable mixed-radix DFT/IDFT processor Oct 28, 2018 Issued
Array ( [id] => 16667038 [patent_doc_number] => 10936284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Apparatus and methods for neural network operations supporting floating point numbers of short bit length [patent_app_type] => utility [patent_app_number] => 16/174084 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5719 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174084 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/174084
Apparatus and methods for neural network operations supporting floating point numbers of short bit length Oct 28, 2018 Issued
Array ( [id] => 15685713 [patent_doc_number] => 20200097520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => APPARATUS AND METHODS FOR VECTOR OPERATIONS [patent_app_type] => utility [patent_app_number] => 16/172049 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4063 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -37 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172049 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172049
Apparatus and methods for vector operations Oct 25, 2018 Issued
Array ( [id] => 18331078 [patent_doc_number] => 11636325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => In-memory data pooling for machine learning [patent_app_type] => utility [patent_app_number] => 16/169345 [patent_app_country] => US [patent_app_date] => 2018-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 8731 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16169345 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/169345
In-memory data pooling for machine learning Oct 23, 2018 Issued
Array ( [id] => 16248283 [patent_doc_number] => 10747642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Automatic behavior detection and characterization in software systems [patent_app_type] => utility [patent_app_number] => 16/166066 [patent_app_country] => US [patent_app_date] => 2018-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 26 [patent_no_of_words] => 7579 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16166066 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/166066
Automatic behavior detection and characterization in software systems Oct 19, 2018 Issued
Array ( [id] => 14076591 [patent_doc_number] => 20190087183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => METHOD AND APPARATUS FOR PERFORMING LOGICAL COMPARE OPERATIONS [patent_app_type] => utility [patent_app_number] => 16/164736 [patent_app_country] => US [patent_app_date] => 2018-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14557 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16164736 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/164736
Method and apparatus for performing logical compare operations Oct 17, 2018 Issued
Array ( [id] => 15804371 [patent_doc_number] => 20200125328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => CHARGE-SCALING MULTIPLIER CIRCUIT WITH DUAL SCALED CAPACITOR SETS [patent_app_type] => utility [patent_app_number] => 16/162437 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16162437 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/162437
Charge-scaling multiplier circuit with dual scaled capacitor sets Oct 16, 2018 Issued
Array ( [id] => 14188873 [patent_doc_number] => 20190114142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => ARITHMETIC PROCESSOR, ARITHMETIC PROCESSING APPARATUS INCLUDING ARITHMETIC PROCESSOR, INFORMATION PROCESSING APPARATUS INCLUDING ARITHMETIC PROCESSING APPARATUS, AND CONTROL METHOD FOR ARITHMETIC PROCESSING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/158380 [patent_app_country] => US [patent_app_date] => 2018-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 34607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16158380 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/158380
Arithmetic processor, arithmetic processing apparatus including arithmetic processor, information processing apparatus including arithmetic processing apparatus, and control method for arithmetic processing apparatus Oct 11, 2018 Issued
Array ( [id] => 14555351 [patent_doc_number] => 10346137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Trailing or leading digit anticipator [patent_app_type] => utility [patent_app_number] => 16/152021 [patent_app_country] => US [patent_app_date] => 2018-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9323 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16152021 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/152021
Trailing or leading digit anticipator Oct 3, 2018 Issued
Array ( [id] => 15743801 [patent_doc_number] => 20200110789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => ENHANCING HYBRID QUANTUM-CLASSICAL ALGORITHMS FOR OPTIMIZATION [patent_app_type] => utility [patent_app_number] => 16/151444 [patent_app_country] => US [patent_app_date] => 2018-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16151444 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/151444
Enhancing hybrid quantum-classical algorithms for optimization Oct 3, 2018 Issued
Array ( [id] => 13991987 [patent_doc_number] => 20190065151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => DIGITAL BIT-SERIAL MULTI-MULTIPLY-AND-ACCUMULATE COMPUTE IN MEMORY [patent_app_type] => utility [patent_app_number] => 16/145569 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5152 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145569 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/145569
Digital bit-serial multi-multiply-and-accumulate compute in memory Sep 27, 2018 Issued
Array ( [id] => 15258073 [patent_doc_number] => 20190377770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => METHOD FOR RE-ENTRY PREDICTION OF UNCONTROLLED ARTIFICIAL SPACE OBJECT [patent_app_type] => utility [patent_app_number] => 16/146157 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146157 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/146157
METHOD FOR RE-ENTRY PREDICTION OF UNCONTROLLED ARTIFICIAL SPACE OBJECT Sep 27, 2018 Abandoned
Array ( [id] => 14735439 [patent_doc_number] => 10387119 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Processing circuitry for encoded fields of related threads [patent_app_type] => utility [patent_app_number] => 16/146147 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7427 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146147 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/146147
Processing circuitry for encoded fields of related threads Sep 27, 2018 Issued
Array ( [id] => 16520731 [patent_doc_number] => 10871946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-22 [patent_title] => Methods for using a multiplier to support multiple sub-multiplication operations [patent_app_type] => utility [patent_app_number] => 16/144999 [patent_app_country] => US [patent_app_date] => 2018-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 9843 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16144999 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/144999
Methods for using a multiplier to support multiple sub-multiplication operations Sep 26, 2018 Issued
Array ( [id] => 17558135 [patent_doc_number] => 11314843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Mathematical problem solving circuit comprising resistive elements [patent_app_type] => utility [patent_app_number] => 16/650883 [patent_app_country] => US [patent_app_date] => 2018-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6187 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16650883 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/650883
Mathematical problem solving circuit comprising resistive elements Sep 26, 2018 Issued
Array ( [id] => 13905991 [patent_doc_number] => 20190042200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => Continuous Carry-Chain Packing [patent_app_type] => utility [patent_app_number] => 16/145151 [patent_app_country] => US [patent_app_date] => 2018-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8657 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145151 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/145151
Continuous carry-chain packing Sep 26, 2018 Issued
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