
Tan V Mai
Examiner (ID: 13419, Phone: (571)272-3726 , Office: P/2182 )
| Most Active Art Unit | 2193 |
| Art Unit(s) | 2787, 2183, 2121, 2182, 2193, 2301, 2306, 2124, 2786, 2302 |
| Total Applications | 3863 |
| Issued Applications | 3431 |
| Pending Applications | 94 |
| Abandoned Applications | 349 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11958257
[patent_doc_number] => 20170262410
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-14
[patent_title] => 'PARALLEL COMPUTER AND FFT OPERATION METHOD'
[patent_app_type] => utility
[patent_app_number] => 15/439093
[patent_app_country] => US
[patent_app_date] => 2017-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 38
[patent_figures_cnt] => 38
[patent_no_of_words] => 20202
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15439093
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/439093 | Parallel computer and FFT operation method | Feb 21, 2017 | Issued |
Array
(
[id] => 11870113
[patent_doc_number] => 20170237398
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-17
[patent_title] => 'PHASE-SELECTIVE ENTRAINMENT OF NONLINEAR OSCILLATOR ENSEMBLES'
[patent_app_type] => utility
[patent_app_number] => 15/436582
[patent_app_country] => US
[patent_app_date] => 2017-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 14788
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15436582
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/436582 | Phase-selective entrainment of nonlinear oscillator ensembles | Feb 16, 2017 | Issued |
Array
(
[id] => 11870113
[patent_doc_number] => 20170237398
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-17
[patent_title] => 'PHASE-SELECTIVE ENTRAINMENT OF NONLINEAR OSCILLATOR ENSEMBLES'
[patent_app_type] => utility
[patent_app_number] => 15/436582
[patent_app_country] => US
[patent_app_date] => 2017-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 14788
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15436582
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/436582 | Phase-selective entrainment of nonlinear oscillator ensembles | Feb 16, 2017 | Issued |
Array
(
[id] => 12687994
[patent_doc_number] => 20180121164
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-03
[patent_title] => RADIX 16 PD TABLE IMPLEMENTED WITH A RADIX 4 PD TABLE
[patent_app_type] => utility
[patent_app_number] => 15/431323
[patent_app_country] => US
[patent_app_date] => 2017-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9745
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15431323
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/431323 | Radix 16 PD table implemented with a radix 4 PD table | Feb 12, 2017 | Issued |
Array
(
[id] => 12712924
[patent_doc_number] => 20180129474
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-10
[patent_title] => CLOSEPATH FAST INCREMENTED SUM IN A THREE-PATH FUSED MULTIPLY-ADD DESIGN
[patent_app_type] => utility
[patent_app_number] => 15/430438
[patent_app_country] => US
[patent_app_date] => 2017-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6533
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15430438
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/430438 | Closepath fast incremented sum in a three-path fused multiply-add design | Feb 9, 2017 | Issued |
Array
(
[id] => 13974693
[patent_doc_number] => 10216703
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-26
[patent_title] => Analog co-processor
[patent_app_type] => utility
[patent_app_number] => 15/427591
[patent_app_country] => US
[patent_app_date] => 2017-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6305
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 395
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15427591
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/427591 | Analog co-processor | Feb 7, 2017 | Issued |
Array
(
[id] => 11651388
[patent_doc_number] => 20170147289
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-25
[patent_title] => 'Trailing or Leading Zero Counter Having Parallel and Combinational Logic'
[patent_app_type] => utility
[patent_app_number] => 15/426907
[patent_app_country] => US
[patent_app_date] => 2017-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8996
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15426907
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/426907 | Trailing or leading zero counter having parallel and combinational logic | Feb 6, 2017 | Issued |
Array
(
[id] => 12291561
[patent_doc_number] => 09934198
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-04-03
[patent_title] => Apparatus for performing modal interval calculations based on decoration configuration
[patent_app_type] => utility
[patent_app_number] => 15/419215
[patent_app_country] => US
[patent_app_date] => 2017-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 34
[patent_no_of_words] => 8415
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 362
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15419215
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/419215 | Apparatus for performing modal interval calculations based on decoration configuration | Jan 29, 2017 | Issued |
Array
(
[id] => 13866519
[patent_doc_number] => 20190029600
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-31
[patent_title] => SIGNAL PROCESSING METHOD AND APPARATUS
[patent_app_type] => utility
[patent_app_number] => 16/071542
[patent_app_country] => US
[patent_app_date] => 2017-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3616
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16071542
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/071542 | Signal processing method and apparatus | Jan 18, 2017 | Issued |
Array
(
[id] => 13143487
[patent_doc_number] => 10089077
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-10-02
[patent_title] => Parallel processing circuitry for encoded fields of related threads
[patent_app_type] => utility
[patent_app_number] => 15/402820
[patent_app_country] => US
[patent_app_date] => 2017-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 7309
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15402820
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/402820 | Parallel processing circuitry for encoded fields of related threads | Jan 9, 2017 | Issued |
Array
(
[id] => 12570951
[patent_doc_number] => 10019233
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-10
[patent_title] => Semiconductor device, position detection device, and control method of semiconductor device
[patent_app_type] => utility
[patent_app_number] => 15/402671
[patent_app_country] => US
[patent_app_date] => 2017-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 11583
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15402671
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/402671 | Semiconductor device, position detection device, and control method of semiconductor device | Jan 9, 2017 | Issued |
Array
(
[id] => 11747164
[patent_doc_number] => 20170201237
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-13
[patent_title] => 'CUSTOMIZABLE DATA AGGREGATING, DATA SORTING, AND DATA TRANSFORMATION SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 15/401711
[patent_app_country] => US
[patent_app_date] => 2017-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 14259
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15401711
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/401711 | Customizable data aggregating, data sorting, and data transformation system | Jan 8, 2017 | Issued |
Array
(
[id] => 12418665
[patent_doc_number] => 09973174
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-15
[patent_title] => Method and apparatus for determining stability factor of adaptive filter
[patent_app_type] => utility
[patent_app_number] => 15/400147
[patent_app_country] => US
[patent_app_date] => 2017-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 14124
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15400147
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/400147 | Method and apparatus for determining stability factor of adaptive filter | Jan 5, 2017 | Issued |
Array
(
[id] => 11570517
[patent_doc_number] => 20170109161
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-20
[patent_title] => 'SIMD SIGN OPERATION'
[patent_app_type] => utility
[patent_app_number] => 15/393963
[patent_app_country] => US
[patent_app_date] => 2016-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 15730
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15393963
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/393963 | SIMD sign operation | Dec 28, 2016 | Issued |
Array
(
[id] => 11570674
[patent_doc_number] => 20170109318
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-20
[patent_title] => 'METHOD, APPARATUS AND INSTRUCTIONS FOR PARALLEL DATA CONVERSIONS'
[patent_app_type] => utility
[patent_app_number] => 15/392359
[patent_app_country] => US
[patent_app_date] => 2016-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 7798
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15392359
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/392359 | Method, apparatus and instructions for parallel data conversions | Dec 27, 2016 | Issued |
Array
(
[id] => 12046460
[patent_doc_number] => 09824063
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-21
[patent_title] => 'Method, apparatus and instructions for parallel data conversions'
[patent_app_type] => utility
[patent_app_number] => 15/392503
[patent_app_country] => US
[patent_app_date] => 2016-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 7798
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15392503
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/392503 | Method, apparatus and instructions for parallel data conversions | Dec 27, 2016 | Issued |
Array
(
[id] => 16943366
[patent_doc_number] => 11055613
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-06
[patent_title] => Method and apparatus for a binary neural network mapping scheme utilizing a gate array architecture
[patent_app_type] => utility
[patent_app_number] => 16/463764
[patent_app_country] => US
[patent_app_date] => 2016-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 23
[patent_no_of_words] => 15346
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16463764
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/463764 | Method and apparatus for a binary neural network mapping scheme utilizing a gate array architecture | Dec 27, 2016 | Issued |
Array
(
[id] => 12046459
[patent_doc_number] => 09824062
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-21
[patent_title] => 'Method, apparatus and instructions for parallel data conversions'
[patent_app_type] => utility
[patent_app_number] => 15/392451
[patent_app_country] => US
[patent_app_date] => 2016-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 7788
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15392451
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/392451 | Method, apparatus and instructions for parallel data conversions | Dec 27, 2016 | Issued |
Array
(
[id] => 12046457
[patent_doc_number] => 09824061
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-21
[patent_title] => 'Method, apparatus and instructions for parallel data conversions'
[patent_app_type] => utility
[patent_app_number] => 15/392413
[patent_app_country] => US
[patent_app_date] => 2016-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 7788
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 262
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15392413
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/392413 | Method, apparatus and instructions for parallel data conversions | Dec 27, 2016 | Issued |
Array
(
[id] => 11884426
[patent_doc_number] => 09755616
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-09-05
[patent_title] => 'Method and apparatus for data filtering, and method and apparatus for constructing data filter'
[patent_app_type] => utility
[patent_app_number] => 15/391122
[patent_app_country] => US
[patent_app_date] => 2016-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 14896
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15391122
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/391122 | Method and apparatus for data filtering, and method and apparatus for constructing data filter | Dec 26, 2016 | Issued |