Search

Tan V Mai

Examiner (ID: 13419, Phone: (571)272-3726 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2183, 2121, 2182, 2193, 2301, 2306, 2124, 2786, 2302
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10569304 [patent_doc_number] => 09292474 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-22 [patent_title] => 'Configurable hybrid adder circuitry' [patent_app_type] => utility [patent_app_number] => 13/957113 [patent_app_country] => US [patent_app_date] => 2013-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 17 [patent_no_of_words] => 6627 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13957113 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/957113
Configurable hybrid adder circuitry Jul 31, 2013 Issued
Array ( [id] => 10112762 [patent_doc_number] => 09148183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-29 [patent_title] => 'Optimal low power complex filter' [patent_app_type] => utility [patent_app_number] => 13/953730 [patent_app_country] => US [patent_app_date] => 2013-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 6684 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13953730 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/953730
Optimal low power complex filter Jul 28, 2013 Issued
Array ( [id] => 9840704 [patent_doc_number] => 20150032786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-29 [patent_title] => 'IDENTIFICATION OF THE BIT POSITION OF A SELECTED INSTANCE OF A PARTICULAR BIT VALUE IN A BINARY BIT STRING' [patent_app_type] => utility [patent_app_number] => 13/952057 [patent_app_country] => US [patent_app_date] => 2013-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5546 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13952057 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/952057
Identification of the bit position of a selected instance of a particular bit value in a binary bit string Jul 25, 2013 Issued
Array ( [id] => 10310113 [patent_doc_number] => 20150195114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-09 [patent_title] => 'FFT CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/414503 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 12502 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14414503 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/414503
FFT circuit Jul 16, 2013 Issued
Array ( [id] => 9123466 [patent_doc_number] => 20130290389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'FUNCTIONALITY DISABLE AND RE-ENABLE FOR PROGRAMMABLE CALCULATORS' [patent_app_type] => utility [patent_app_number] => 13/929268 [patent_app_country] => US [patent_app_date] => 2013-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4061 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13929268 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/929268
FUNCTIONALITY DISABLE AND RE-ENABLE FOR PROGRAMMABLE CALCULATORS Jun 26, 2013 Abandoned
Array ( [id] => 9123470 [patent_doc_number] => 20130290393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'Expanded Scope Incrementer' [patent_app_type] => utility [patent_app_number] => 13/926918 [patent_app_country] => US [patent_app_date] => 2013-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2776 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13926918 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/926918
Expanded scope incrementer Jun 24, 2013 Issued
Array ( [id] => 10054095 [patent_doc_number] => 09093983 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-28 [patent_title] => 'Movable tap finite impulse response filter' [patent_app_type] => utility [patent_app_number] => 13/917165 [patent_app_country] => US [patent_app_date] => 2013-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6118 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13917165 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/917165
Movable tap finite impulse response filter Jun 12, 2013 Issued
Array ( [id] => 9096174 [patent_doc_number] => 20130275485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'Technique for Optimization and Re-Use of Hardware in the Implementation of Instructions Used in Viterbi and Turbo Decoding, Using Carry Save Arithmetic' [patent_app_type] => utility [patent_app_number] => 13/916810 [patent_app_country] => US [patent_app_date] => 2013-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3925 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13916810 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/916810
Technique for optimization and re-use of hardware in the implementation of instructions used in Viterbi and turbo decoding, using carry save arithmetic Jun 12, 2013 Issued
Array ( [id] => 9096173 [patent_doc_number] => 20130275484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'DIVISION CIRCUIT AND MEMORY CONTROLLER' [patent_app_type] => utility [patent_app_number] => 13/911511 [patent_app_country] => US [patent_app_date] => 2013-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4558 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13911511 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/911511
DIVISION CIRCUIT AND MEMORY CONTROLLER Jun 5, 2013 Abandoned
Array ( [id] => 9070792 [patent_doc_number] => 20130262547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA' [patent_app_type] => utility [patent_app_number] => 13/906240 [patent_app_country] => US [patent_app_date] => 2013-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9680 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13906240 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/906240
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA May 29, 2013 Abandoned
Array ( [id] => 9071080 [patent_doc_number] => 20130262836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA' [patent_app_type] => utility [patent_app_number] => 13/906248 [patent_app_country] => US [patent_app_date] => 2013-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9701 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13906248 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/906248
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA May 29, 2013 Abandoned
Array ( [id] => 10948285 [patent_doc_number] => 20140351307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'CALCULATING NODE CENTRALITIES IN LARGE NETWORKS AND GRAPHS' [patent_app_type] => utility [patent_app_number] => 13/900040 [patent_app_country] => US [patent_app_date] => 2013-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5715 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13900040 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/900040
Calculating node centralities in large networks and graphs May 21, 2013 Issued
Array ( [id] => 10934379 [patent_doc_number] => 20140337399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-13 [patent_title] => 'METHOD OF GENERATING RANDOM NUMBERS III' [patent_app_type] => utility [patent_app_number] => 13/892991 [patent_app_country] => US [patent_app_date] => 2013-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 8749 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13892991 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/892991
METHOD OF GENERATING RANDOM NUMBERS III May 12, 2013 Abandoned
Array ( [id] => 9035708 [patent_doc_number] => 20130238345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'PARTIALLY COMPLEX MODULATED FILTER BANK' [patent_app_type] => utility [patent_app_number] => 13/872930 [patent_app_country] => US [patent_app_date] => 2013-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 15139 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13872930 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/872930
Partially complex modulated filter bank Apr 28, 2013 Issued
Array ( [id] => 12398016 [patent_doc_number] => 09966932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-08 [patent_title] => Parallel filtering method and corresponding apparatus [patent_app_type] => utility [patent_app_number] => 14/785359 [patent_app_country] => US [patent_app_date] => 2013-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5384 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 477 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14785359 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/785359
Parallel filtering method and corresponding apparatus Apr 18, 2013 Issued
Array ( [id] => 9369225 [patent_doc_number] => 20140079098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'MULTI-STAGE CHARGE RE-USE ANALOG CIRCUITS' [patent_app_type] => utility [patent_app_number] => 13/859476 [patent_app_country] => US [patent_app_date] => 2013-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 18225 [patent_no_of_claims] => 108 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859476 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/859476
Multi-stage charge re-use analog circuits Apr 8, 2013 Issued
Array ( [id] => 9768713 [patent_doc_number] => 20140292375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-02 [patent_title] => 'ANALOG ACCUMULATOR' [patent_app_type] => utility [patent_app_number] => 13/853870 [patent_app_country] => US [patent_app_date] => 2013-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9778 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13853870 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/853870
Analog accumulator Mar 28, 2013 Issued
Array ( [id] => 9070794 [patent_doc_number] => 20130262550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'MATRIX CALCULATION DEVICE, MATRIX CALCULATION METHOD, AND STORAGE MEDIUM HAVING MATRIX CALCULATION PROGRAM STORED THEREON' [patent_app_type] => utility [patent_app_number] => 13/846752 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7692 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13846752 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/846752
Matrix calculation device, matrix calculation method, and storage medium having matrix calculation program stored thereon Mar 17, 2013 Issued
Array ( [id] => 9015208 [patent_doc_number] => 20130230172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'Novel binary and n-state Linear Feedback Shift Registers (LFSRs)' [patent_app_type] => utility [patent_app_number] => 13/846296 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13846296 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/846296
Novel binary and n-state Linear Feedback Shift Registers (LFSRs) Mar 17, 2013 Abandoned
Array ( [id] => 9036241 [patent_doc_number] => 20130238879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'METHOD, APPARATUS AND INSTRUCTIONS FOR PARALLEL DATA CONVERSIONS' [patent_app_type] => utility [patent_app_number] => 13/836365 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7714 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13836365 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/836365
Method, apparatus and instructions for parallel data conversions Mar 14, 2013 Issued
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