Search

Tan V Mai

Examiner (ID: 13419, Phone: (571)272-3726 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2183, 2121, 2182, 2193, 2301, 2306, 2124, 2786, 2302
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8906180 [patent_doc_number] => 20130173683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'Range Check Based Lookup Tables' [patent_app_type] => utility [patent_app_number] => 13/608189 [patent_app_country] => US [patent_app_date] => 2012-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6103 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13608189 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/608189
Range check based lookup tables Sep 9, 2012 Issued
Array ( [id] => 8703680 [patent_doc_number] => 08396915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Processor for performing multiply-add operations on packed data' [patent_app_type] => utility [patent_app_number] => 13/603370 [patent_app_country] => US [patent_app_date] => 2012-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 9654 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13603370 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/603370
Processor for performing multiply-add operations on packed data Sep 3, 2012 Issued
Array ( [id] => 8568702 [patent_doc_number] => 20120331272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'SIMD SIGN OPERATION' [patent_app_type] => utility [patent_app_number] => 13/602502 [patent_app_country] => US [patent_app_date] => 2012-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 15629 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13602502 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/602502
SIMD sign operation Sep 3, 2012 Issued
Array ( [id] => 8722713 [patent_doc_number] => 20130073930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-21 [patent_title] => 'PARITY PREDICTOR, CARRY-LESS MULTIPLIER AND ARITHMETIC OPERATION PROCESSING APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/598908 [patent_app_country] => US [patent_app_date] => 2012-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 62 [patent_figures_cnt] => 62 [patent_no_of_words] => 31853 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13598908 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/598908
PARITY PREDICTOR, CARRY-LESS MULTIPLIER AND ARITHMETIC OPERATION PROCESSING APPARATUS Aug 29, 2012 Abandoned
Array ( [id] => 9940454 [patent_doc_number] => 08990284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Method and apparatus for signal filtering and for improving properties of electronic devices' [patent_app_type] => utility [patent_app_number] => 13/599866 [patent_app_country] => US [patent_app_date] => 2012-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 119 [patent_figures_cnt] => 119 [patent_no_of_words] => 34275 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13599866 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/599866
Method and apparatus for signal filtering and for improving properties of electronic devices Aug 29, 2012 Issued
Array ( [id] => 9926056 [patent_doc_number] => 08984041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-17 [patent_title] => 'Performing arithmetic operations using both large and small floating point values' [patent_app_type] => utility [patent_app_number] => 13/598847 [patent_app_country] => US [patent_app_date] => 2012-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6244 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13598847 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/598847
Performing arithmetic operations using both large and small floating point values Aug 29, 2012 Issued
Array ( [id] => 9885686 [patent_doc_number] => 08972470 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Method of generating random number using nonvolatile memory in two-track scheme and apparatus for the same' [patent_app_type] => utility [patent_app_number] => 13/595186 [patent_app_country] => US [patent_app_date] => 2012-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4099 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13595186 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/595186
Method of generating random number using nonvolatile memory in two-track scheme and apparatus for the same Aug 26, 2012 Issued
Array ( [id] => 9304413 [patent_doc_number] => 20140043087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'HIGH ACCURACY BIPOLAR CURRENT MULTIPLIER WITH BASE CURRENT COMPENSATION' [patent_app_type] => utility [patent_app_number] => 13/569672 [patent_app_country] => US [patent_app_date] => 2012-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3263 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13569672 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/569672
HIGH ACCURACY BIPOLAR CURRENT MULTIPLIER WITH BASE CURRENT COMPENSATION Aug 7, 2012 Abandoned
Array ( [id] => 8639348 [patent_doc_number] => 20130031151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'INCORPORATING NOISE AND/OR JITTER INTO WAVEFORM GENERATION' [patent_app_type] => utility [patent_app_number] => 13/567867 [patent_app_country] => US [patent_app_date] => 2012-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8305 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13567867 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/567867
Incorporating noise and/or jitter into waveform generation Aug 5, 2012 Issued
Array ( [id] => 9296700 [patent_doc_number] => 20140040334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'DATA PROCESSING APPARATUS AND METHOD FOR REDUCING THE SIZE OF A LOOKUP TABLE' [patent_app_type] => utility [patent_app_number] => 13/562497 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7856 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562497 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/562497
Data processing apparatus and method for reducing the size of a lookup table Jul 30, 2012 Issued
Array ( [id] => 8650356 [patent_doc_number] => 20130036085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-07 [patent_title] => 'METHOD FOR SOLVING LINEAR PROGRAMS' [patent_app_type] => utility [patent_app_number] => 13/559849 [patent_app_country] => US [patent_app_date] => 2012-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 12587 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13559849 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/559849
Method for solving linear programs Jul 26, 2012 Issued
Array ( [id] => 8906177 [patent_doc_number] => 20130173680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'Fixed-Coefficient Variable Prime Length Recursive Discrete Fourier Transform System' [patent_app_type] => utility [patent_app_number] => 13/557451 [patent_app_country] => US [patent_app_date] => 2012-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 16022 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13557451 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/557451
Fixed-coefficient variable prime length recursive discrete Fourier transform system Jul 24, 2012 Issued
Array ( [id] => 10027723 [patent_doc_number] => 09069624 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-06-30 [patent_title] => 'Systems and methods for DSP block enhancement' [patent_app_type] => utility [patent_app_number] => 13/555907 [patent_app_country] => US [patent_app_date] => 2012-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 9829 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13555907 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/555907
Systems and methods for DSP block enhancement Jul 22, 2012 Issued
Array ( [id] => 11264879 [patent_doc_number] => 09489176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-08 [patent_title] => 'Optimized matrix and vector operations in instruction limited algorithms that perform EOS calculations' [patent_app_type] => utility [patent_app_number] => 14/342268 [patent_app_country] => US [patent_app_date] => 2012-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 10158 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14342268 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/342268
Optimized matrix and vector operations in instruction limited algorithms that perform EOS calculations Jul 22, 2012 Issued
Array ( [id] => 8661100 [patent_doc_number] => 20130041929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-14 [patent_title] => 'ARITHMETIC CIRCUIT AND ARITHMETIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/546683 [patent_app_country] => US [patent_app_date] => 2012-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8991 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13546683 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/546683
Arithmetic circuit and arithmetic apparatus Jul 10, 2012 Issued
Array ( [id] => 10860480 [patent_doc_number] => 08886695 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-11-11 [patent_title] => 'Normalization of floating point operations in a programmable integrated circuit device' [patent_app_type] => utility [patent_app_number] => 13/545405 [patent_app_country] => US [patent_app_date] => 2012-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4594 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13545405 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/545405
Normalization of floating point operations in a programmable integrated circuit device Jul 9, 2012 Issued
Array ( [id] => 8478967 [patent_doc_number] => 20120278374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-01 [patent_title] => 'Decimal Floating-Point Quantum Exception Detection' [patent_app_type] => utility [patent_app_number] => 13/544338 [patent_app_country] => US [patent_app_date] => 2012-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5789 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13544338 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/544338
Decimal floating-point quantum exception detection Jul 8, 2012 Issued
Array ( [id] => 10183844 [patent_doc_number] => 09213523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-15 [patent_title] => 'Double rounded combined floating-point multiply and add' [patent_app_type] => utility [patent_app_number] => 13/539198 [patent_app_country] => US [patent_app_date] => 2012-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 28 [patent_no_of_words] => 18259 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13539198 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/539198
Double rounded combined floating-point multiply and add Jun 28, 2012 Issued
Array ( [id] => 10834460 [patent_doc_number] => 08862652 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-14 [patent_title] => 'Method and apparatus for performing lossy integer multiplier synthesis' [patent_app_type] => utility [patent_app_number] => 13/537527 [patent_app_country] => US [patent_app_date] => 2012-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13537527 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/537527
Method and apparatus for performing lossy integer multiplier synthesis Jun 28, 2012 Issued
Array ( [id] => 8588263 [patent_doc_number] => 20130007084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'FLOATING-POINT ADDER' [patent_app_type] => utility [patent_app_number] => 13/536113 [patent_app_country] => US [patent_app_date] => 2012-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8305 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13536113 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/536113
Floating-point adder Jun 27, 2012 Issued
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