Search

Tan V Mai

Examiner (ID: 13419, Phone: (571)272-3726 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2183, 2121, 2182, 2193, 2301, 2306, 2124, 2786, 2302
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6488603 [patent_doc_number] => 20100259324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-14 [patent_title] => 'BROAD-BAND ACTIVE DELAY LINE' [patent_app_type] => utility [patent_app_number] => 12/434690 [patent_app_country] => US [patent_app_date] => 2009-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2275 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20100259324.pdf [firstpage_image] =>[orig_patent_app_number] => 12434690 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/434690
Broad-band active delay line May 3, 2009 Issued
Array ( [id] => 6530742 [patent_doc_number] => 20100262640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-14 [patent_title] => 'HIGH-SPEED CONTINUOUS-TIME FIR FILTER' [patent_app_type] => utility [patent_app_number] => 12/421647 [patent_app_country] => US [patent_app_date] => 2009-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4428 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20100262640.pdf [firstpage_image] =>[orig_patent_app_number] => 12421647 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/421647
High-speed continuous-time fir filter Apr 9, 2009 Issued
Array ( [id] => 6324590 [patent_doc_number] => 20100244943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'FILTER SHAPING USING A SIGNAL CANCELLATION FUNCTION' [patent_app_type] => utility [patent_app_number] => 12/413454 [patent_app_country] => US [patent_app_date] => 2009-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8122 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20100244943.pdf [firstpage_image] =>[orig_patent_app_number] => 12413454 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/413454
Filter shaping using a signal cancellation function Mar 26, 2009 Issued
Array ( [id] => 5356272 [patent_doc_number] => 20090187616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-23 [patent_title] => 'Method for Representing Complex Numbers in a Communication System' [patent_app_type] => utility [patent_app_number] => 12/412223 [patent_app_country] => US [patent_app_date] => 2009-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16569 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20090187616.pdf [firstpage_image] =>[orig_patent_app_number] => 12412223 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/412223
Method for representing complex numbers in a communication system Mar 25, 2009 Issued
Array ( [id] => 5497381 [patent_doc_number] => 20090265409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-22 [patent_title] => 'PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA' [patent_app_type] => utility [patent_app_number] => 12/409275 [patent_app_country] => US [patent_app_date] => 2009-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9540 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20090265409.pdf [firstpage_image] =>[orig_patent_app_number] => 12409275 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/409275
Processor for performing multiply-add operations on packed data Mar 22, 2009 Issued
Array ( [id] => 9115960 [patent_doc_number] => 08572152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-29 [patent_title] => 'CORDIC computation circuit and method' [patent_app_type] => utility [patent_app_number] => 12/919632 [patent_app_country] => US [patent_app_date] => 2009-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5915 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12919632 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/919632
CORDIC computation circuit and method Mar 4, 2009 Issued
Array ( [id] => 9578563 [patent_doc_number] => 08768997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Passive switched-capacitor filters conforming to power constraint' [patent_app_type] => utility [patent_app_number] => 12/366363 [patent_app_country] => US [patent_app_date] => 2009-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 11881 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12366363 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/366363
Passive switched-capacitor filters conforming to power constraint Feb 4, 2009 Issued
Array ( [id] => 6312897 [patent_doc_number] => 20100194444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'REDUCTION OF SPURIOUS FREQUENCY COMPONENTS IN DIRECT DIGITAL SYNTHESIS' [patent_app_type] => utility [patent_app_number] => 12/363660 [patent_app_country] => US [patent_app_date] => 2009-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5014 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20100194444.pdf [firstpage_image] =>[orig_patent_app_number] => 12363660 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/363660
REDUCTION OF SPURIOUS FREQUENCY COMPONENTS IN DIRECT DIGITAL SYNTHESIS Jan 29, 2009 Abandoned
Array ( [id] => 6313971 [patent_doc_number] => 20100194759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'MATHEMATICAL EXPRESSION ENTRY' [patent_app_type] => utility [patent_app_number] => 12/363590 [patent_app_country] => US [patent_app_date] => 2009-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6554 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20100194759.pdf [firstpage_image] =>[orig_patent_app_number] => 12363590 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/363590
Mathematical expression entry Jan 29, 2009 Issued
Array ( [id] => 5565891 [patent_doc_number] => 20090138744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-28 [patent_title] => 'MULTIPLIER DEVICE WITH SUPPRESSION OF HIGHER-ORDER DISTORTION' [patent_app_type] => utility [patent_app_number] => 12/360555 [patent_app_country] => US [patent_app_date] => 2009-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2775 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20090138744.pdf [firstpage_image] =>[orig_patent_app_number] => 12360555 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/360555
MULTIPLIER DEVICE WITH SUPPRESSION OF HIGHER-ORDER DISTORTION Jan 26, 2009 Abandoned
Array ( [id] => 6153010 [patent_doc_number] => 20110022650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-27 [patent_title] => 'DIGITAL OPTIMAL FILTER FOR PERIODICALLY ALTERNATING SIGNALS' [patent_app_type] => utility [patent_app_number] => 12/812699 [patent_app_country] => US [patent_app_date] => 2009-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 2960 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20110022650.pdf [firstpage_image] =>[orig_patent_app_number] => 12812699 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/812699
Digital optimal filter for periodically alternating signals Jan 7, 2009 Issued
Array ( [id] => 5342987 [patent_doc_number] => 20090181637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'ADAPTIVE FILTER FOR CHANNEL ESTIMATION WITH ADAPTIVE STEP-SIZE' [patent_app_type] => utility [patent_app_number] => 12/347850 [patent_app_country] => US [patent_app_date] => 2008-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6290 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20090181637.pdf [firstpage_image] =>[orig_patent_app_number] => 12347850 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/347850
Adaptive filter for channel estimation with adaptive step-size Dec 30, 2008 Issued
Array ( [id] => 5437480 [patent_doc_number] => 20090172067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'METHODS AND APPARATUS FOR IMPLEMENTING A SATURATING MULTIPLIER' [patent_app_type] => utility [patent_app_number] => 12/346692 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6225 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20090172067.pdf [firstpage_image] =>[orig_patent_app_number] => 12346692 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346692
Methods and apparatus for implementing a saturating multiplier Dec 29, 2008 Issued
Array ( [id] => 8786891 [patent_doc_number] => 08433745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-30 [patent_title] => 'Scalable cost function generator and method thereof' [patent_app_type] => utility [patent_app_number] => 12/340307 [patent_app_country] => US [patent_app_date] => 2008-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1956 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12340307 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/340307
Scalable cost function generator and method thereof Dec 18, 2008 Issued
Array ( [id] => 5442670 [patent_doc_number] => 20090094309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-09 [patent_title] => 'SYSTEM AND METHOD TO IMPLEMENT A MATRIX MULTIPLY UNIT OF A BROADBAND PROCESSOR' [patent_app_type] => utility [patent_app_number] => 12/330962 [patent_app_country] => US [patent_app_date] => 2008-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5323 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20090094309.pdf [firstpage_image] =>[orig_patent_app_number] => 12330962 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/330962
System and method to implement a matrix multiply unit of a broadband processor Dec 8, 2008 Issued
Array ( [id] => 5286447 [patent_doc_number] => 20090100122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'SATURATION AND ROUNDING IN MULTIPLY-ACCUMULATE BLOCKS' [patent_app_type] => utility [patent_app_number] => 12/324055 [patent_app_country] => US [patent_app_date] => 2008-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6054 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20090100122.pdf [firstpage_image] =>[orig_patent_app_number] => 12324055 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/324055
SATURATION AND ROUNDING IN MULTIPLY-ACCUMULATE BLOCKS Nov 25, 2008 Abandoned
Array ( [id] => 8786883 [patent_doc_number] => 08433737 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-04-30 [patent_title] => 'Spurious DDS signal suppression' [patent_app_type] => utility [patent_app_number] => 12/277824 [patent_app_country] => US [patent_app_date] => 2008-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2502 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12277824 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/277824
Spurious DDS signal suppression Nov 24, 2008 Issued
Array ( [id] => 7803511 [patent_doc_number] => 08131795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-06 [patent_title] => 'High speed adder design for a multiply-add based floating point unit' [patent_app_type] => utility [patent_app_number] => 12/323257 [patent_app_country] => US [patent_app_date] => 2008-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3280 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/131/08131795.pdf [firstpage_image] =>[orig_patent_app_number] => 12323257 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/323257
High speed adder design for a multiply-add based floating point unit Nov 24, 2008 Issued
Array ( [id] => 6607586 [patent_doc_number] => 20100131579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-27 [patent_title] => 'SETTING CORDIC ITERATION COUNTS' [patent_app_type] => utility [patent_app_number] => 12/277388 [patent_app_country] => US [patent_app_date] => 2008-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3241 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20100131579.pdf [firstpage_image] =>[orig_patent_app_number] => 12277388 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/277388
Setting cordic iteration counts Nov 24, 2008 Issued
Array ( [id] => 5565684 [patent_doc_number] => 20090138537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-28 [patent_title] => 'Address generating circuit and semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/292257 [patent_app_country] => US [patent_app_date] => 2008-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8375 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20090138537.pdf [firstpage_image] =>[orig_patent_app_number] => 12292257 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/292257
Address generating circuit and semiconductor memory device Nov 13, 2008 Abandoned
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