Search

Tan V Mai

Examiner (ID: 15743, Phone: (571)272-3726 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4570655 [patent_doc_number] => 07962537 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-14 [patent_title] => 'Determining a table output of a table representing a hierarchical tree for an integer valued function' [patent_app_type] => utility [patent_app_number] => 11/768742 [patent_app_country] => US [patent_app_date] => 2007-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4891 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/962/07962537.pdf [firstpage_image] =>[orig_patent_app_number] => 11768742 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/768742
Determining a table output of a table representing a hierarchical tree for an integer valued function Jun 25, 2007 Issued
Array ( [id] => 4854326 [patent_doc_number] => 20080320069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'VARIABLE LENGTH FFT APPARATUS AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/766783 [patent_app_country] => US [patent_app_date] => 2007-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3585 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20080320069.pdf [firstpage_image] =>[orig_patent_app_number] => 11766783 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/766783
VARIABLE LENGTH FFT APPARATUS AND METHOD THEREOF Jun 20, 2007 Abandoned
Array ( [id] => 8219644 [patent_doc_number] => 08195726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-05 [patent_title] => 'Systems, devices, and methods for solving computational problems' [patent_app_type] => utility [patent_app_number] => 11/765361 [patent_app_country] => US [patent_app_date] => 2007-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 11144 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/195/08195726.pdf [firstpage_image] =>[orig_patent_app_number] => 11765361 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/765361
Systems, devices, and methods for solving computational problems Jun 18, 2007 Issued
Array ( [id] => 4891269 [patent_doc_number] => 20080100366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'Signal processing method and signal processing apparatus' [patent_app_type] => utility [patent_app_number] => 11/812371 [patent_app_country] => US [patent_app_date] => 2007-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4279 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20080100366.pdf [firstpage_image] =>[orig_patent_app_number] => 11812371 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/812371
Signal processing method and signal processing apparatus Jun 17, 2007 Issued
Array ( [id] => 4804546 [patent_doc_number] => 20080016135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'METHOD AND APPARATUS FOR GENERATING AN INITIAL VALUE FOR A PSEUDO-RANDOM NUMBER GENERATOR' [patent_app_type] => utility [patent_app_number] => 11/756311 [patent_app_country] => US [patent_app_date] => 2007-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4127 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20080016135.pdf [firstpage_image] =>[orig_patent_app_number] => 11756311 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/756311
Method and apparatus for generating an initial value for a pseudo-random number generator May 30, 2007 Issued
Array ( [id] => 4712684 [patent_doc_number] => 20080301210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'RANDOM TELEGRAPH SIGNAL NOISE AS A SOURCE FOR RANDOM NUMBERS' [patent_app_type] => utility [patent_app_number] => 11/756363 [patent_app_country] => US [patent_app_date] => 2007-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2985 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0301/20080301210.pdf [firstpage_image] =>[orig_patent_app_number] => 11756363 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/756363
Random telegraph signal noise as a source for random numbers May 30, 2007 Issued
Array ( [id] => 8022191 [patent_doc_number] => 08140608 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-03-20 [patent_title] => 'Pipelined integer division using floating-point reciprocal' [patent_app_type] => utility [patent_app_number] => 11/756188 [patent_app_country] => US [patent_app_date] => 2007-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3887 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/140/08140608.pdf [firstpage_image] =>[orig_patent_app_number] => 11756188 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/756188
Pipelined integer division using floating-point reciprocal May 30, 2007 Issued
Array ( [id] => 4602642 [patent_doc_number] => 07979484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-12 [patent_title] => 'Method and system for accelerating the computation of adaptive weights using matrix inverse calculations' [patent_app_type] => utility [patent_app_number] => 11/754647 [patent_app_country] => US [patent_app_date] => 2007-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 4776 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/979/07979484.pdf [firstpage_image] =>[orig_patent_app_number] => 11754647 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/754647
Method and system for accelerating the computation of adaptive weights using matrix inverse calculations May 28, 2007 Issued
Array ( [id] => 6312085 [patent_doc_number] => 20100070549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'RANDOM NUMBER GENERATOR SYSTEM, METHOD FOR GENERATING RANDOM NUMBERS' [patent_app_type] => utility [patent_app_number] => 12/305792 [patent_app_country] => US [patent_app_date] => 2007-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8493 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20100070549.pdf [firstpage_image] =>[orig_patent_app_number] => 12305792 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/305792
RANDOM NUMBER GENERATOR SYSTEM, METHOD FOR GENERATING RANDOM NUMBERS May 24, 2007 Abandoned
Array ( [id] => 5383557 [patent_doc_number] => 20090224801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-10 [patent_title] => 'PATTERN MATCHING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/300723 [patent_app_country] => US [patent_app_date] => 2007-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4485 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20090224801.pdf [firstpage_image] =>[orig_patent_app_number] => 12300723 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/300723
PATTERN MATCHING APPARATUS May 20, 2007 Abandoned
Array ( [id] => 4930883 [patent_doc_number] => 20080001658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'Four-gate transistor analog multiplier circuit' [patent_app_type] => utility [patent_app_number] => 11/804893 [patent_app_country] => US [patent_app_date] => 2007-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3181 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20080001658.pdf [firstpage_image] =>[orig_patent_app_number] => 11804893 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/804893
Four-gate transistor analog multiplier circuit May 20, 2007 Issued
Array ( [id] => 5260573 [patent_doc_number] => 20070214205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'MODULAR BINARY MULTIPLIER FOR SIGNED AND UNSIGNED OPERANDS OF VARIABLE WIDTHS' [patent_app_type] => utility [patent_app_number] => 11/749239 [patent_app_country] => US [patent_app_date] => 2007-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10690 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20070214205.pdf [firstpage_image] =>[orig_patent_app_number] => 11749239 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/749239
Modular binary multiplier for signed and unsigned operands of variable widths May 15, 2007 Issued
Array ( [id] => 7686565 [patent_doc_number] => 20090177726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-09 [patent_title] => 'METHOD FOR PROCESSING A DIGITAL INPUT SIGNAL IN A DIGITAL DOMAIN AND DIGITAL FILTER CIRCUIT FOR PROCESSING A DIGITAL INPUT SIGNAL' [patent_app_type] => utility [patent_app_number] => 12/305736 [patent_app_country] => US [patent_app_date] => 2007-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3214 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20090177726.pdf [firstpage_image] =>[orig_patent_app_number] => 12305736 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/305736
METHOD FOR PROCESSING A DIGITAL INPUT SIGNAL IN A DIGITAL DOMAIN AND DIGITAL FILTER CIRCUIT FOR PROCESSING A DIGITAL INPUT SIGNAL May 15, 2007 Abandoned
Array ( [id] => 4592660 [patent_doc_number] => 07853635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Modular binary multiplier for signed and unsigned operands of variable widths' [patent_app_type] => utility [patent_app_number] => 11/749224 [patent_app_country] => US [patent_app_date] => 2007-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10728 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/853/07853635.pdf [firstpage_image] =>[orig_patent_app_number] => 11749224 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/749224
Modular binary multiplier for signed and unsigned operands of variable widths May 15, 2007 Issued
Array ( [id] => 4978841 [patent_doc_number] => 20070220076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Data processing apparatus and method for converting a number between fixed-point and floating-point presentations' [patent_app_type] => utility [patent_app_number] => 11/798547 [patent_app_country] => US [patent_app_date] => 2007-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12792 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20070220076.pdf [firstpage_image] =>[orig_patent_app_number] => 11798547 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/798547
Data processing apparatus and method for converting a number between fixed-point and floating-point representations May 14, 2007 Issued
Array ( [id] => 4557238 [patent_doc_number] => 07877428 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-25 [patent_title] => 'Processor system including processor and coprocessor' [patent_app_type] => utility [patent_app_number] => 11/741146 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 6946 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/877/07877428.pdf [firstpage_image] =>[orig_patent_app_number] => 11741146 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741146
Processor system including processor and coprocessor Apr 26, 2007 Issued
Array ( [id] => 5198240 [patent_doc_number] => 20070297558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'EVENT DURATION AND SIGNAL VALUE MINIMUM AND MAXIMUM CIRCUIT FOR PERFORMANCE COUNTER' [patent_app_type] => utility [patent_app_number] => 11/741560 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7867 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0297/20070297558.pdf [firstpage_image] =>[orig_patent_app_number] => 11741560 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741560
EVENT DURATION AND SIGNAL VALUE MINIMUM AND MAXIMUM CIRCUIT FOR PERFORMANCE COUNTER Apr 26, 2007 Abandoned
Array ( [id] => 4861647 [patent_doc_number] => 20080270497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'CONVERT SIGNIFICAND OF DECIMAL FLOATING POINT DATA TO/FROM PACKED DECIMAL FORMAT' [patent_app_type] => utility [patent_app_number] => 11/740721 [patent_app_country] => US [patent_app_date] => 2007-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 17179 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20080270497.pdf [firstpage_image] =>[orig_patent_app_number] => 11740721 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/740721
Employing a mask field of an instruction to encode a sign of a result of the instruction Apr 25, 2007 Issued
Array ( [id] => 7537475 [patent_doc_number] => 08051117 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-01 [patent_title] => 'Shift significand of decimal floating point data' [patent_app_type] => utility [patent_app_number] => 11/740701 [patent_app_country] => US [patent_app_date] => 2007-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 30 [patent_no_of_words] => 17327 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/051/08051117.pdf [firstpage_image] =>[orig_patent_app_number] => 11740701 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/740701
Shift significand of decimal floating point data Apr 25, 2007 Issued
Array ( [id] => 7537475 [patent_doc_number] => 08051117 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-01 [patent_title] => 'Shift significand of decimal floating point data' [patent_app_type] => utility [patent_app_number] => 11/740701 [patent_app_country] => US [patent_app_date] => 2007-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 30 [patent_no_of_words] => 17327 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/051/08051117.pdf [firstpage_image] =>[orig_patent_app_number] => 11740701 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/740701
Shift significand of decimal floating point data Apr 25, 2007 Issued
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