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Tan V. Mai

Examiner (ID: 3888, Phone: (571)272-3726 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2301, 2121, 2183, 2302, 2306, 2182, 2193, 2786, 2124
Total Applications
3863
Issued Applications
3434
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
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17/223921
Architecture to support tanh and sigmoid operations for inference acceleration in machine learning Apr 5, 2021 Issued
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17/223921
Architecture to support tanh and sigmoid operations for inference acceleration in machine learning Apr 5, 2021 Issued
Array ( [id] => 19045850 [patent_doc_number] => 11934965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Architecture to support tanh and sigmoid operations for inference acceleration in machine learning [patent_app_type] => utility [patent_app_number] => 17/223921 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3697 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223921 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/223921
Architecture to support tanh and sigmoid operations for inference acceleration in machine learning Apr 5, 2021 Issued
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17/223921
Architecture to support tanh and sigmoid operations for inference acceleration in machine learning Apr 5, 2021 Issued
Array ( [id] => 19045850 [patent_doc_number] => 11934965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Architecture to support tanh and sigmoid operations for inference acceleration in machine learning [patent_app_type] => utility [patent_app_number] => 17/223921 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3697 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223921 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/223921
Architecture to support tanh and sigmoid operations for inference acceleration in machine learning Apr 5, 2021 Issued
Array ( [id] => 19045850 [patent_doc_number] => 11934965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Architecture to support tanh and sigmoid operations for inference acceleration in machine learning [patent_app_type] => utility [patent_app_number] => 17/223921 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3697 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223921 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/223921
Architecture to support tanh and sigmoid operations for inference acceleration in machine learning Apr 5, 2021 Issued
Array ( [id] => 19045850 [patent_doc_number] => 11934965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Architecture to support tanh and sigmoid operations for inference acceleration in machine learning [patent_app_type] => utility [patent_app_number] => 17/223921 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3697 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223921 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/223921
Architecture to support tanh and sigmoid operations for inference acceleration in machine learning Apr 5, 2021 Issued
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17/223921
Architecture to support tanh and sigmoid operations for inference acceleration in machine learning Apr 5, 2021 Issued
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17/223921
Architecture to support tanh and sigmoid operations for inference acceleration in machine learning Apr 5, 2021 Issued
Array ( [id] => 17899464 [patent_doc_number] => 20220309126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => APPROXIMATION OF MATRICES FOR MATRIX MULTIPLY OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/214784 [patent_app_country] => US [patent_app_date] => 2021-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17214784 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/214784
Approximation of matrices for matrix multiply operations Mar 25, 2021 Issued
Array ( [id] => 19426785 [patent_doc_number] => 12086205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Random sparsity handling in a systolic array [patent_app_type] => utility [patent_app_number] => 17/211627 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 43 [patent_no_of_words] => 31825 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211627 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211627
Random sparsity handling in a systolic array Mar 23, 2021 Issued
Array ( [id] => 17143998 [patent_doc_number] => 20210312011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => PERMUTING IN A MATRIX-VECTOR PROCESSOR [patent_app_type] => utility [patent_app_number] => 17/208214 [patent_app_country] => US [patent_app_date] => 2021-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17208214 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/208214
Permuting in a matrix-vector processor Mar 21, 2021 Issued
Array ( [id] => 19626049 [patent_doc_number] => 12164882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => In-memory computation circuit and method [patent_app_type] => utility [patent_app_number] => 17/203130 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 13998 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17203130 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/203130
In-memory computation circuit and method Mar 15, 2021 Issued
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17/203591
Method of data processing, corresponding MAC circuit, DSP system and computer program product Mar 15, 2021 Issued
Array ( [id] => 19369581 [patent_doc_number] => 12061665 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Inverse element arithmetic apparatus and memory system [patent_app_type] => utility [patent_app_number] => 17/197256 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 14851 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 538 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197256 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/197256
Inverse element arithmetic apparatus and memory system Mar 9, 2021 Issued
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17/195703
Matrix compression accelerator system and method Mar 8, 2021 Issued
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17/196922
Hardware architecture for processing data in neural network Mar 8, 2021 Issued
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17/195917
Processing device and electronic device having the same Mar 8, 2021 Issued
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17/194392
Storage organization for transposing a matrix using a streaming engine Mar 7, 2021 Issued
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17/187120
Trailing or leading digit anticipator Feb 25, 2021 Issued
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